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Hoofdstuk 6 Het voorspellen van prestaties Prof. dr. ir. Dirk Stroobandt Academiejaar 2004-2005.

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Presentation on theme: "Hoofdstuk 6 Het voorspellen van prestaties Prof. dr. ir. Dirk Stroobandt Academiejaar 2004-2005."— Presentation transcript:

1 Hoofdstuk 6 Het voorspellen van prestaties Prof. dr. ir. Dirk Stroobandt Academiejaar

2 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Inhoud (deel 2) Het belang van interconnecties Het belang van ingebed geheugen Het voorspellen van prestaties Architecturen voor complexe systemen –Processorarchitecturen –Herconfigureerbare hardware –Hergebruik van IP-kernen Interfaces en interface-ontwerp

3 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Ontwerptraject Platformontwerp Hardware/software-partitionering Hoogniveausynthese Logisch ontwerp Fysisch ontwerp Software- compilatie Software- compilatie HWSW Hardware-ontwerp Component- selectie Component- selectie Systeemspecificatie Architectuurexploratie Schattingen vooraleer implementatiedetails bekend zijn!

4 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen ? Interconnect from a system designer’s perspective: matching requirements with available and future technologies System-level specifications Technological interconnect/ component properties ? Required interconnect properties Impact on system performance Very wide gap to bridge

5 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Early performance evaluation needed

6 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Region where refinement is needed Early performance evaluation needed Fast estimates as indication of whether or not a proposed solution is far from or near to the Pareto front. If it is far away: discard. If it is close: gradually improve estimation accuracy. Pareto-optimal solution Pareto front/curve Infeasible region Inferior results Delay Power

7 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Classical Digital Design Flow X=(ABCD+A+D+A(B+C)) Y=(A(B+C)+AC+D+A(BC+D)) System specification Functional design Logic design Circuit designPhysical designFabricationPackaging and testing

8 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Interconnect-centric Design Flow X=(ABCD+A+D+A(B+C)) Y=(A(B+C)+AC+D+A(BC+D)) Packaging and testing Fabrication Circuit design Physical design Logic design Functional design System specification Physical and technological a priori estimations

9 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Where are the estimates needed in the design process? Circuit design Fabrication Physical design Floorplanning Placement Routing

10 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Components of the physical design step Layout Layout generation Circuit Architecture Technology

11 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Net Terminal / pin The Three Basic Models Circuit model Placement and routing model Model for the architecture Pad Channel Manhattan grid using Manhattan metric Cell Logic block

12 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Net External net Internal net Logic block Multi-terminal nets have a net degree > 2 Circuit model Terminal / pin

13 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen nets cut 4 nets cut Model for partitioning Optimal partitioning: minimal number of nets cut

14 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Model for partitioning Module New net New terminal

15 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen T = t B p Rent’s Rule (simple) 0  p*  1 (complex) Normal values: 0.5  p*  0.75 Measure for the complexity of the interconnection topology Intrinsic Rent exponent p* p = Rent exponent Rent’s rule was first described by Landman and Russo* in For average number of terminals and blocks per module in a partitioned design: t  average # term./block * B. S. Landman and R. L. Russo. “On a pin versus block relationship for partitions of logic graphs.” IEEE Trans. on Comput., C-20, pp , 1971.

16 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Rent’s Rule (cont.) Rent’s rule is a result of the self-similarity within circuits Assumption: the complexity of the interconnection topology is equal at all levels.

17 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Rent’s Rule (summary) average Rent’s rule Rent’s rule is experimentally validated for a lot of benchmarks. T = t B p Distinguish between: p*: intrinsic Rent exponent p: placement Rent exponent p’: partitioning Rent exponent Deviation for high B and T: Rent’s region II* Also: deviation for low B and T: Rent region III**

18 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Hierarchical locality: region III For some circuits: also deviation at low end. Mismatch between the available (library) and the desired (design) complexity of interconnect topology. Only for circuits with logic blocks that have many inputs. T

19 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Hierarchical locality: modelling Use incremental Rent exponent (proportional to the slope of Rent’s curve in a single point).

20 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Spatial locality in Rent’s rule Inhomogeneous circuits: different parts have different interconnection complexity. For separate parts: Only one Rent exponent (heterogeneous) might not be realistic. Clustering: simple parts will be absorbed by complex parts.

21 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Local Rent exponent Higher partitioning levels: Rent exponents will merge. Spreading of the values with steep slope (decreasing) for complex part and gentle slope (increasing) for simple part. Local Rent exponent tangent slope of the line that combines all partitions containing the local block(s). T B

22 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Heterogeneous Rent’s rule Suggested by (Zarkesh-Ha, Davis, Loh, and Meindl,’98) Weighted arithmetic average of the logarithm of T: Heterogeneous Rent’s rule (for 2 parts):

23 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Partition the circuit into 4 modules of equal size such that Rent’s rule applies (minimal number of pins). 2. Partition the Manhattan grid in 4 subgrids of equal size in a symmetrical way. Donath’s* Hierarchical Placement Model * W. E. Donath. Placement and Average Interconnection Lengths of Computer Logic. IEEE Trans. on Circuits & Syst., vol. CAS-26, pp , 1979.

24 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Each subcircuit (module) is mapped to a subgrid. 4. Repeat recursively until all logic blocks are assigned to exactly one grid cell in the Manhattan grid. Donath’s Hierarchical Placement Model mapping

25 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Donath’s Length Estimation Model At each level: Rent’s rule gives number of connections –number of terminals per module directly from Rent’s rule (partitioning based Rent exponent p’); –number of nets cut at level k (N k ) equals where  depends on the total number of nets in the circuit and is bounded by 0.5 and 1.

26 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Donath’s Length Estimation Model Length of the connections at level k ? Donath assumes: all connection source and destination cells are uniformly distributed over the grid. Adjacent ( A -) combination Diagonal ( D -) combination

27 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Results Donath Scaling of the average length L as a function of the number of logic blocks G : L G p = 0.7 p = 0.5 p = 0.3 Similar to measurements on placed designs.

28 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Results Donath Theoretical average wire length too high by factor of L G experiment theory 0

29 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Occupation probability* favours short interconnections (for placement optimization) (darker) Keep wire length scaling by hierarchical placement. Improve on uniform probability for all connections at one level (not a good model for placement optimization). Improving on the Placement Optimization Model

30 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Including Placement Optimization Wirelength distributions contain two parts: site density function and probability distribution all possibilities requires enumeration (use generating polynomials) probability of occurrence shorter wires more probable

31 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Occupation Probability Function From this we can deduct that Local distributions at each level have similar shapes (self-similarity)  peak values scale. Integral of local distributions equals number of connections. Global distribution follows peaks Wire length Theory Experiment L p,1 P1P1 L 1,l L p,2 P2P2 L 2,l L p,0 P0P0 L 0,l DlDl Length l Number of connections For short lengths:

32 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Occupation Probability Function Same result found by using a terminal conservation technique* * J. A. Davis et al. A Stochastic Wire-length Distribution for Gigascale Integration (GSI) - PART I: Derivation and Validation. IEEE Trans. on Electron Dev., 45 (3), pp , C BA C BA C BA C BA C BA =+-- TACTAC TABTAB T BC TBTB T ABC = +-- Assumption: net cannot connect A,B, and C B B BB BB B ABB BB B C C C C C C C C C C C C

33 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Occupation Probability Function For cells placed in infinite 2D plane B B BB BB B ABB BB B C C C C C C C C C C C C

34 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Occupation Probability: Results 8 Occupation prob L G Donath Experiment Use probability on each hierarchical level (local distributions).

35 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Occupation Probability: Results Effect of the occupation probability: boosting the local wire length distributions (per level) for short wire lengths Occupation prob. 100 Wire length Percent of wires ,1 0, Per level Total Global trend Donath 1 Wire length Per level Total Global trend 10000

36 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Effect of the occupation probability on the total distribution: more short wires = less long wires  Average wire length is shorter Occupation Probability: Results Wire length Percent wires Occupation prob. Donath

37 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Occupation Probability: Results Wire length Percent wires Occupation prob. Donath Global trend -23% -8% +10% +6%

38 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Occupation Probability: Results 0, Wire length Number of wires Occupation prob. Donath Measurement 10

39 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Number of multi-terminal net connections at each hierarchical level Difference between delay-related and routing-related applications: - Source-sink pairs Assume A is source A-B at level k A-C and A-D at level k+1 Count as three connections - Entire Steiner tree lengths Segments A-B, C-D and E-F A-B and C-D at level k E-F at level k+1 Add lengths to one net length A B C D F E Level k +1 Level k Net terminal Steiner point Assumption: multi-terminal nets are split over only two partitions at every hierarchical level * D. Stroobandt. Multi-terminal Nets Do Change Conventional Wire Length Distribution Models. Workshop SLIP 2001.

40 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Resulting net degree distribution converges toward power law for large designs Analytical power law approximation based on value for 2- and 3-terminal nets. Net degree distribution depends on two parameters: 1)Rent exponent p 2)New parameter  and increases with increasing p and also with increasing  Multi-terminal Net model* * D. Stroobandt and F.J. Kurdahi. “On the characterization of multi-point nets in electronic designs.” Proc. 8 th Great Lakes Symp. on VSLI, pp , February 1998.

41 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Scaling behaviour of average wire length Net segment length (previous model) Source-sink length (new model) Steiner tree length (new model) Resulting Wire Length Distributions A v e r a g e l e n g t h Two-terminal nets only Circuit size  =0.1  =0.2  =0.3  =0.4  =0.5

42 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Experimental Verification Steiner tree lengths More accurate Steiner length estimates SA-based placement Steiner lengths measured by Geosteiner  New model better fits measured data (average lengths within 25%)

43 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Experimental Verification Source-sink pair lengths are generally underestimated Steiner tree lengths are really close to measured ones A v e r a g e l e n g t h Rent exponent Measured source-sink length distribution Stroobandt's length distribution New source-sink length distribution

44 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Analysis of existing techniques Donath-typeDavis-type Sensitivity to Rent parametersvery large Rent parameters measurable a priori? yes, by recursive partitioning no known method without full placement Flexibility of method for changes in architecture limitedOK Robustness of assumptionsvery robustflaws

45 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Using Rent characteristic

46 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Result of using Rent characteristic

47 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Recent work on wire length distribution estimations Correlation: > Correlation: > 0.999

48 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Architecture model extensions Three-dimensional architectures [Van Marck and Stroobandt, SLIP 1999 – 2001], [Saraswat, SLIP 2000], [Joyner, SLIP TVLSI 2001], [Rahman, SLIP 2001] Wiring layer assignment [Stroobandt, SLIP 2000], [Venkatesan, SLIP 2000 – TVLSI 2001], [Christie, SLIP 2002] Rectangular grids / cells [Dambre, SLIP 2001 – 2002] Routing obstacles [Liu and Stroobandt, TVLSI 2002] X-architecture [Teig, SLIP 2002]

49 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Real circuit placements considerations* Donath’s method Rent’s rule Gates = 4 K = grid size Square grid with square cells 4-way partitioning based placement No optimization Real placements Deviations: Rent characteristic Gates != 4 K != grid size Possibly rectangular grid and/or rectangular cells Often bipartitioning based placement Lots of optimization * J. Dambre, P. Verplaetse, D. Stroobandt and J. Van Campenhout. “Getting more out of Donath’s hierarchical model for interconnect prediction.” SLIP ’02, pp. 9-16, April 2002.

50 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Correlation: Average error: 6.57% Correlation: Average error: 6.57% Recent work on wire length distribution estimations

51 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Interconnect prediction for VLSI design Parameters from interconnect topology Technology and design parameters Wire length distribution Interconnect lengths affect: costcost power dissipationpower dissipation yieldyield performance (clock cycle)performance (clock cycle) etc....etc....

52 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Prediction of routing resources (area) Layer assignment and effect of vias Layer assignment and effect of vias Estimation of required routing resources Estimation of required routing resources Parameters from interconnect topology Technology and design parameters Wire length distribution

53 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen –Wire length estimation models (Donath, …) –Actual placement information Models of achievable routing Required versus available resources

54 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Required versus available resources Limited by routing efficiency, power/ground nets and via impact Models of achievable routing

55 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Typical layer assignment example Tier type 2 Tier type 1 Tier type 0 Wire length (mm) Delay (ps) Wire width (  m) Number of repeaters

56 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Possible applications of layer assignment models A priori yield estimates (design for manufacturability) [Christie and de Gyvez, SLIP 2001 – TVLSI 2003] –Interconnect functional yield model for cuts and bridges –Relation to wire length distribution through wire pattern density estimation [Zarkesh-Ha, SLIP 2003 – 2004] Estimates of required number of wiring layers [Stroobandt, SLIP 2000] Total area estimates Total or average power estimates

57 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Prediction of minimal clock cycle in synchronous digital systems Distribution of gate and wire delays Distribution and expected value of minimal clock cycle Parameters from interconnect topology Technology and design parameters Wire length distribution

58 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Prediction of achievable clock cycle in VLSI design

59 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Extrapolation to future systems: –Roadmaps. –GTX (Kahng, DAC 2000 – TVLSI 2003) Technology extrapolation

60 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Interconnect prediction for three-dimensional systems Parameters from interconnect topology Technology and design parameters Additional parameter: Relative cost of 3D interconnectionRelative cost of 3D interconnection Wire length distribution Wire length distribution for 3D system

61 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Three-dimensional chips Wire length distribution differs significantly* * J. Van Campenhout, H. Van Marck, J. Depreitere, J. Dambre, “Optoelectronic FPGA’s” IEEE J. Sel. Topics in Quant. Electr. (5)2, 1999, pp Topological complexity Average wire lengthDistribution

62 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Effect of Anisotropy Benefits are lower if anisotropy is higher* Number of layers (4096 gates) Average wire length Cost = 1 Cost = 16 Cost = 8 Cost = 24 * J. Van Campenhout, H. Van Marck, J. Depreitere, J. Dambre, “Optoelectronic FPGA’s” IEEE J. Sel. Topics in Quant. Electr. (5)2, 1999, pp

63 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Result: increase in operation speed possible with low-latency optical interconnect 3-D interconnect leads to performance gains if optical link latency is small enough Gains biggest for large and complex circuits Impact of circuit interconnect complexity for benchmarks ‘apex4’ (non-complex) and ‘i10’ (complex)

64 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Extension to Three-dimensional Grids*

65 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Anisotropic Systems*

66 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Anisotropic Systems Not all dimensions are equal (e.g., optical links in 3rd D) –Possibly larger latency of the optical link (compared to intra-chip connection); –Influence of the spacing of the optical links across the area (detours may have to be made); –Limitation of number of optical layers Introducing an optical cost

67 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen External Nets Importance of good wire length estimates for external nets* during the placement process: For highly pin-limited designs: placement will be in a ring-shaped fashion (along the border of the chip).

68 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Wire Lengths at System Level At system level: many long wires (peak in distribution). How to model these? Estimation* based on Rent’s rule with the floorplanning blocks as logic blocks. * P. Zarkesh-Ha, J. A. Davis and J. D. Meindl. Prediction of Net length distribution for Global Interconnects in a Heterogeneous System-on-a- chip. IEEE Trans. on VLSI Systems, Spec. Iss. on SLIP, pp , 2000.


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