Presentation is loading. Please wait.

Presentation is loading. Please wait.

Datorteknik DigitalCircuits bild 1 Combinational circuits Changes at inputs propagate at logic speed to outputs Not clocked No internal state (memoryless)

Similar presentations


Presentation on theme: "Datorteknik DigitalCircuits bild 1 Combinational circuits Changes at inputs propagate at logic speed to outputs Not clocked No internal state (memoryless)"— Presentation transcript:

1 Datorteknik DigitalCircuits bild 1 Combinational circuits Changes at inputs propagate at logic speed to outputs Not clocked No internal state (memoryless)

2 Datorteknik DigitalCircuits bild 2 Example I O 11 & & I2 I1 I0 O 1

3 Datorteknik DigitalCircuits bild 3 NOT combinational & & S R - latch (has a state) D Q D - flip-flop (clocked, no path)

4 Datorteknik DigitalCircuits bild 4 Combinational logic can be connected into sequences - can be connected parallel 1111 & 1

5 Datorteknik DigitalCircuits bild 5 Combinatorial loop This is OK: But what is this? 1 1 1

6 Datorteknik DigitalCircuits bild 6 Combinatorial loop Impossible! Logical nonsense Electrical trouble

7 Datorteknik DigitalCircuits bild 7 Combinational loop This is a “combinational loop” We must never have, or form, a combinational loop

8 Datorteknik DigitalCircuits bild 8 How is this usually solved? D Q “The edge-triggered flip-flop!”

9 Datorteknik DigitalCircuits bild 9 The edge-triggered flip-flop! Never a combinational path from in to out A memory device, holds the value of “Q” until “clocked” Ignores the value at “in” until “clocked” D Q in out

10 Datorteknik DigitalCircuits bild 10 Beginners explanation Flipflop “samples” its input at the rising edge Flipflop presents that value at the falling edge D Q t clock 1 0 A “rising edge” A “falling edge”

11 Datorteknik DigitalCircuits bild 11 Flip flops in the circuit We will put flip flops in our circuit (Good for “breaking” combinational loops) and clock them all with the same clock D Q

12 Datorteknik DigitalCircuits bild 12 Example D Q t 0 1 Assume we have this: 10 clock = 0 At this time the D-FF “senses” the “1” at its input NO PATH! At this time, it lets that “1” appear at its output Never combinational path thru!

13 Datorteknik DigitalCircuits bild 13 Example 1 BAD OK D Q 1 Suppose the flip flop holds a “1”. Let’s clock this circuit...

14 Datorteknik DigitalCircuits bild 14 Example D Q Holding Clock “pulse” one “clock cycle”

15 Datorteknik DigitalCircuits bild 15 Example D Q Samples the “0”

16 Datorteknik DigitalCircuits bild 16 Example D Q Already sampled But output hasn’t changed yet!

17 Datorteknik DigitalCircuits bild 17 Example D Q The exact instant that the output changes!

18 Datorteknik DigitalCircuits bild 18 Example D Q the circuit becomes stable again A very short time later... Called a logic “delay” (Propagation through the combinational logic)

19 Datorteknik DigitalCircuits bild 19 Example D Q until the next clocking And it stays like that....

20 Datorteknik DigitalCircuits bild 20 Back to combinational logic Zero extend box Sign extend box Controllable sign/zero extend box “Tap box” (pick out fields of bits) Shift left two bits

21 Datorteknik DigitalCircuits bild 21 Zero extend box 16 In[0..15] Out[16..31] Out[0..15] 16 zeroes !

22 Datorteknik DigitalCircuits bild 22 Sign extend box 16 In[0..15] Out[16..31] Out[0..15] In[15] copied 16 times

23 Datorteknik DigitalCircuits bild 23 Controllable zero / sign extend box 16 In[0..15] Out[16..31] Out[0..15] In[15] & Control

24 Datorteknik DigitalCircuits bild 24 Tap box Contains no logic circuits Regroup input bits Opcode field Instruction Rs field Rt field Rd field Immediate field

25 Datorteknik DigitalCircuits bild 25 Shift left two bits 32 Out bit [2..31*] In bit [0..31] Out bit 1 Out bit * Two bits lost

26 Datorteknik DigitalCircuits bild 26 Arbitrary logic Given a truth table: A B C D X Y Z Digital design Logic ABCDABCD XYZXYZ

27 Datorteknik DigitalCircuits bild 27 So, it’s enough just to have the truth table..... We have tools to build the “logic box” “Logic synthesis”

28 Datorteknik DigitalCircuits bild 28 The multiplexor Special truth table: A B Cont Out Easy to generalise to “A, B, C, D....” A B Cont Out

29 Datorteknik DigitalCircuits bild 29 Shifters Two kinds: logical-- value shifted in is always "0" arithmetic-- on right shifts, sign extend msblsb"0" msblsb"0" Note: these are single bit shifts. A given instruction might request 0 to 32 bits to be shifted!

30 Datorteknik DigitalCircuits bild 30 Combinational Shifter from MUXes What comes in the MSBs? How many levels for 32-bit shifter? What if we use 4-1 Muxes ? 1 0sel A B D Basic Building Block 8-bit right shifter S 2 S 1 S 0 A0A0 A1A1 A2A2 A3A3 A4A4 A5A5 A6A6 A7A7 R0R0 R1R1 R2R2 R3R3 R4R4 R5R5 R6R6 R7R7

31 Datorteknik DigitalCircuits bild 31 General Shift Right Scheme using 16 bit example If added Right-to-left connections could support Rotate (not in MIPS but found in ISAs)

32 Datorteknik DigitalCircuits bild 32 Barrel Shifter Technology-dependent solutions: 1 transistor per switch:

33 Datorteknik DigitalCircuits bild 33 What about adders? A[0] A[1].... A[31] B[0] B[31]C[0] C[1].... C[31] Impractical to represent by truth table Exponential in number of input bits 32 A B C+

34 Datorteknik DigitalCircuits bild 34 Adders are special..... We’ll talk about them later Also, multipliers Let’s just assume they exist

35 Datorteknik DigitalCircuits bild 35 Subtract ? A - B ? = A + NOT (B) + 1 Yes, there’s an easier way A B 1 + +

36 Datorteknik DigitalCircuits bild 36 Controllable Add / Sub ? Subtract Add Choose ABAB

37 Datorteknik DigitalCircuits bild 37 How it’s really done 32 =1 32 A B Choose Carry in +

38 Datorteknik DigitalCircuits bild 38 What’s the point of this ? The ALU is combinational Must have control signals to choose! 32 ALU Control points

39 Datorteknik DigitalCircuits bild bit wide inverter ? In bit[31] In bit[30] In bit[1] In bit[0] Out bit[31] Out bit[30] Out bit[1] Out bit[0] Easier to draw!

40 Datorteknik DigitalCircuits bild 40 Same idea : 32 - bit wide multiplexors 32 - bit wide clocked registers, such as the –Program counter –write back data register D Q 32 Clock signal not drawn

41 Datorteknik DigitalCircuits bild 41 Memories ? Register file Instruction memory Data memory We’ll treat these as combinational (not “clocked”)


Download ppt "Datorteknik DigitalCircuits bild 1 Combinational circuits Changes at inputs propagate at logic speed to outputs Not clocked No internal state (memoryless)"

Similar presentations


Ads by Google