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Datorteknik Pipelining bild 1 Acceleration How to improve speed? At what costs?

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Presentation on theme: "Datorteknik Pipelining bild 1 Acceleration How to improve speed? At what costs?"— Presentation transcript:

1 Datorteknik Pipelining bild 1 Acceleration How to improve speed? At what costs?

2 Datorteknik Pipelining bild 2 T=Nq * CPI * Cycletime Nq, Number of instructions CPI, Cycles Per Instruction Cycletime

3 Datorteknik Pipelining bild 3 Single Cycle Design CPI = 1 Cycletime = Long (Longest path)

4 Datorteknik Pipelining bild 4 Multiple Cycle 1 < CPI < S Cycletime = Factor 1/S

5 Datorteknik Pipelining bild 5 Pipelined design CPI = 1, (Constant) Cycletime = Factor 1/S

6 Datorteknik Pipelining bild 6 “THROUGHPUT” The total amount of work done in a given time

7 Datorteknik Pipelining bild 7 Branch logic Sgn/Ze extend Zero ext. ALU A B INSTRUCTION MEMORY INSTRUCTION MEMORY STAGE (IM)

8 Datorteknik Pipelining bild 8 Branch logic Sgn/Ze extend Zero ext. ALU A B INSTRUCTION DECODE STAGE (DE)

9 Datorteknik Pipelining bild 9 Branch logic Sgn/Ze extend Zero ext. ALU A B INSTRUCTION EXECUTE STAGE (EX)

10 Datorteknik Pipelining bild 10 Branch logic Sgn/Ze extend Zero ext. ALU A B DATA MEMORY STAGE (DM) DATA MEMORY

11 Datorteknik Pipelining bild 11 Branch logic Sgn/Ze extend Zero ext. ALU A B WRITEBACK STAGE (WB)

12 Datorteknik Pipelining bild 12 Pipeline 5 stages, (IM, DE, EX, DM, WB) Writeback NOT in critical path Cut critical path by 4

13 Datorteknik Pipelining bild 13 Branch logic Sgn/Ze extend Zero ext. ALU A B CAN READ/WRITE THE SAME REG! WRITEBACK STAGE (WB)

14 Datorteknik Pipelining bild 14 Single Cycle IM Reg DMReg IM Reg DMReg

15 Datorteknik Pipelining bild 15 IM Reg DMReg 4 Stage Pipe IM Reg DMReg IM Reg DMReg IM Reg DMReg

16 Datorteknik Pipelining bild 16 A Program 0x30 sub $6 $0 $1 0x34 add $7 $0 $1 0x38 ori $2 $0 0xABCD 0x3C sw $5 4($0) $1 holds value 0x05

17 Datorteknik Pipelining bild 17 IM Reg DMReg 4 Stage Pipe IM Reg DMReg IM Reg DMReg IM Reg DMReg 0x30 sub $6 $0 $1 0x34 add $7 $0 $1 0x38 ori $2 $0 0xABCD 0x3C sw $5 4($0)

18 Datorteknik Pipelining bild 18 IM Reg DMReg Step 1 IM Reg DMReg IM Reg DMReg IM Reg DMReg 0x30 sub $6 $0 $1 0x34 add $7 $0 $1 0x38 ori $2 $0 0xABCD 0x3C sw $5 4($0)

19 Datorteknik Pipelining bild 19 IM Reg DMReg Step 2 IM Reg DMReg IM Reg DMReg IM Reg DMReg 0x30 sub $6 $0 $1 0x34 add $7 $0 $1 0x38 ori $2 $0 0xABCD 0x3C sw $5 4($0)

20 Datorteknik Pipelining bild 20 IM Reg DMReg Step 3 IM Reg DMReg IM Reg DMReg IM Reg DMReg 0x30 sub $6 $0 $1 0x34 add $7 $0 $1 0x38 ori $2 $0 0xABCD 0x3C sw $5 4($0)

21 Datorteknik Pipelining bild 21 IM Reg DMReg Step 4 IM Reg DMReg IM Reg DMReg IM Reg DMReg 0x3C sw $5 4($0) 0x30 sub $6 $0 $1 0x34 add $7 $0 $1 0x38 ori $2 $0 0xABCD

22 Datorteknik Pipelining bild 22 IM Reg DMReg Step 5 IM Reg DMReg IM Reg DMReg IM Reg DMReg 0x3C sw $5 4($0) 0x30 sub $6 $0 $1 0x34 add $7 $0 $1 0x38 ori $2 $0 0xABCD

23 Datorteknik Pipelining bild 23 Branch logic Sgn/Ze extend Zero ext. > 0x30 sub $6 $0 $1 0x34 add $7 $0 $1 0x38 ori $2 $0 0xABCD 0x3C sw $5 4($0) ALU A B

24 Datorteknik Pipelining bild 24 Branch logic Sgn/Ze extend Zero ext. 0x30 sub $6 $0 $1 > 0x34 add $7 $0 $1 0x38 ori $2 $0 0xABCD 0x3C sw $5 4($0) ALU A B

25 Datorteknik Pipelining bild 25 Branch logic Sgn/Ze extend Zero ext. ALU A B x30 sub $6 $0 $1 0x34 add $7 $0 $1 > 0x38 ori $2 $0 0xABCD 0x3C sw $5 4($0)

26 Datorteknik Pipelining bild 26 Branch logic Sgn/Ze extend Zero ext. ALU A B x30 sub $6 $0 $1 0x34 add $7 $0 $1 0x38 ori $2 $0 0xABCD > 0x3C sw $5 4($0)


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