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1 Timed CTL Model Checking Region Automata Kim Guldstrand Larsen Paul Pettersson UPPAAL T-shirt to (identifiable) download no 40

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IDA foredrag Timed CTL

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Real Time Systems, DTU, February 21., 2000 Kim G. Larsen & Paul Pettersson UCb 3 Light Switch zSwitch may be turned on whenever at least 2 time units has elapsed since last “turn off” zLight automatically switches off after 9 time units. push click

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Real Time Systems, DTU, February 21., 2000 Kim G. Larsen & Paul Pettersson UCb 4 Semantics zclock valuations: zstate: zSemantics of timed automata is a labeled transition system where zaction transition zdelay Transition g a r ll’

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Real Time Systems, DTU, February 21., 2000 Kim G. Larsen & Paul Pettersson UCb 5 Semantics: Example push click

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Real Time Systems, DTU, February 21., 2000 Kim G. Larsen & Paul Pettersson UCb 6 TCTL = CTL + Time constraints over formula clocks and automata clocks “freeze operator” introduces new formula clock z E[ U ], A[ U ] - like in CTL No EX

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Real Time Systems, DTU, February 21., 2000 Kim G. Larsen & Paul Pettersson UCb 7 Derived Operators Along any path holds continuously until within 7 time units becomes valid. = = The property may becomes valid within 5 time units.

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Real Time Systems, DTU, February 21., 2000 Kim G. Larsen & Paul Pettersson UCb 8 Light Switch (cont) push click

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Real Time Systems, DTU, February 21., 2000 Kim G. Larsen & Paul Pettersson UCb 9 Timeliness Properties receive(m) always occurs within 5 time units after send(m) receive(m) may occur exactly 11 time units after send(m) putbox occurs periodically (exactly) every 25 time units (note: other putbox’s may occur in between)

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Real Time Systems, DTU, February 21., 2000 Kim G. Larsen & Paul Pettersson UCb 10 A1 B1 CS1 V:=1V=1 A2 B2 CS2 V:=2V=2 Init V=1 2 ´´ V Criticial Section Fischer’s Protocol A simple MUTEX Algorithm

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Real Time Systems, DTU, February 21., 2000 Kim G. Larsen & Paul Pettersson UCb 11 A1 B1 CS1 V:=1V=1 A2 B2 CS2 V:=2V=2 Init V=1 2 ´´ V Criticial Section Fischer’s Protocol A simple MUTEX Algorithm Y<1 X:=0 Y:=0 X>1 Y>1 X<1

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Real Time Systems, DTU, February 21., 2000 Kim G. Larsen & Paul Pettersson UCb 12 Paths Example: push click

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Real Time Systems, DTU, February 21., 2000 Kim G. Larsen & Paul Pettersson UCb 13 Elapsed time in path Example:

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Real Time Systems, DTU, February 21., 2000 Kim G. Larsen & Paul Pettersson UCb 14 TCTL Semantics s - (location, clock valuation) w - formula clock valuation P M (s) - set of paths from s Pos( ) - positions in ,i) - elapsed time (i,d) <<(i’,d’) iff (i

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IDA foredrag Region Automata Model Checking

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Real Time Systems, DTU, February 21., 2000 Kim G. Larsen & Paul Pettersson UCb 16 Infinite State Space?

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Real Time Systems, DTU, February 21., 2000 Kim G. Larsen & Paul Pettersson UCb 17 Regions Finite partitioning of state space x y ”Definition”

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Real Time Systems, DTU, February 21., 2000 Kim G. Larsen & Paul Pettersson UCb 18 Regions Finite partitioning of state space x y ”Definition” max determined by timed automata (and formula)

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Real Time Systems, DTU, February 21., 2000 Kim G. Larsen & Paul Pettersson UCb 19 Regions Finite partitioning of state space x y Definition max determined by timed automata (and formula) Alternative to JPK

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Real Time Systems, DTU, February 21., 2000 Kim G. Larsen & Paul Pettersson UCb 20 Regions Finite partitioning of state space x y Definition An equivalence class (i.e. a region) in fact there is only a finite number of regions!!

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Real Time Systems, DTU, February 21., 2000 Kim G. Larsen & Paul Pettersson UCb 21 Regions Finite partitioning of state space x y Definition An equivalence class (i.e. a region) Successor regions, Succ(r) r

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Real Time Systems, DTU, February 21., 2000 Kim G. Larsen & Paul Pettersson UCb 22 Regions Finite partitioning of state space x y Definition An equivalence class (i.e. a region) r {x}r {y}r r Reset regions THEOREM

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Real Time Systems, DTU, February 21., 2000 Kim G. Larsen & Paul Pettersson UCb 23 Region graph of a simple timed automata

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Real Time Systems, DTU, February 21., 2000 Kim G. Larsen & Paul Pettersson UCb 24 Fischers again A1 B1 CS1 V:=1V=1 A2 B2 CS2 V:=2V=2 Y<1 X:=0 Y:=0 X>1 Y>1 X<1 A1,A2,v=1 A1,B2,v=2 A1,CS2,v=2 B1,CS2,v=1 CS1,CS2,v=1 Untimed case A1,A2,v=1 x=y=0 A1,A2,v=1 0

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Real Time Systems, DTU, February 21., 2000 Kim G. Larsen & Paul Pettersson UCb 25 Modified light switch

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Real Time Systems, DTU, February 21., 2000 Kim G. Larsen & Paul Pettersson UCb 26 Reachable part of region graph Properties

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Real Time Systems, DTU, February 21., 2000 Kim G. Larsen & Paul Pettersson UCb 27 Roughly speaking.... Model checking a timed automata against a TCTL-formula amounts to model checking its region graph against a CTL-formula Model checking a timed automata against a TCTL-formula amounts to model checking its region graph against a CTL-formula

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Real Time Systems, DTU, February 21., 2000 Kim G. Larsen & Paul Pettersson UCb 28 Problem to be solved Model Checking TCTL is PSPACE-hard

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IDA foredrag END

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