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Presenter Information: Wallace Scott Military & Space Products, Texas Instruments 6412 Highway 75 South, MS 860 Sherman, Texas 75090, USA Phone (903)-868-6448Fax.

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Presentation on theme: "Presenter Information: Wallace Scott Military & Space Products, Texas Instruments 6412 Highway 75 South, MS 860 Sherman, Texas 75090, USA Phone (903)-868-6448Fax."— Presentation transcript:

1 Presenter Information: Wallace Scott Military & Space Products, Texas Instruments 6412 Highway 75 South, MS 860 Sherman, Texas 75090, USA Phone (903) Fax (903) Heavy Ion Induced Single Event Effects on a 32-Bit, Floating-Point Digital Signal Processor W.Scott, R.Joshi, R.Daniels, T.Linnebur, I.Khan, K.Settle (Texas Instruments), Dr. M.Shoga (Science Applications International Corporation - SAIC), Dr. M.Gauthier (ICS Radiation Technologies, Inc.)

2 The Single Event Effects (SEE) response of SMV320C6701, a 32-bit, floating-point digital signal processor (DSP) from Texas Instruments was tested with heavy ions. The processor was tested for Single Event Latch-up (SEL) and Single Event Upsets (SEU) at room and high temperature. An innovative test methodology and test flow developed for evaluating the SEU response of different functional blocks of the DSP are discussed. The SEU response of various functional blocks of the DSP at different (Linear Energy Transfer) LETs is also presented. Finally, based on the SEE response of the DSP, its potential use in different spacecraft orbits is described. Abstract

3 Test Device - SMV320C6701GLPW14  Advanced VelociTI TM very-long-instruction- word (VLIW) architecture  Up to 1120 MIPS and 840 MFLOPS at 140 MHz  1 Mbit On-Chip SRAM for fast program/data access  2 Multi-Channel Buffered Serial Ports (McBSPs) provide glueless connect to codecs & framers, full duplex operation, and support SPI and ST-Bus  -55°C to 125°C Tcase  429-pin CBGA package C6701 CPU DMA Controller Data Memory 64 KByte Program Memory 64 KByte EMIF McBSP 1 Timer 1 Timer 0 McBSP 0 Host Port Interface 16 32

4 Test Device – Key Parameters Design Features Process Features Library features Core Vdd1.8VStarting Substrate (Baseline for Class-V) EPI (3.5µm) Metal Levels 5 IO Vdd3.3VSTI Depth5000AFlip ChipYes Core Lpoly0.18µmPLLYes Core tox40A IO Lpoly0.45µm IO tox80A

5 Test Details Test Location: Texas A&M University Cyclotron Facility (TAMU-CF), College Station, Texas, USA Website: Test Date: May 18, 2004

6 SEE Test System Monitoring and Recording equipment  Texas Instruments 256-pin Automatic Test Equipment (ATE)  Monitor Supply currents (I/Os, Core, and PLL)  Automatic power-down when supply currents exceed user programmed limits  Event-Driven, exhaustive Functional and SCAN testing Translates to ~5-10 MHz test frequency  High-Speed (167 MHz) memory testing via internal-BIST (Built-In Self-Test)  Log parameters and fail counts

7 Continuity Continuity Open Pins Open Pins Open Supply Open Supply Short Pins Short Pins Short Supply Short Supply Functional Functional Boot Loading Boot Loading Cache Cache Functional Functional Data and Program Memory Data and Program Memory Functional Functional Data word sizes, DMA, EMIF Data word sizes, DMA, EMIF Multi-Channel Serial Ports Multi-Channel Serial Ports Power-down Mode Power-down Mode PLL PLL Functional Functional ATPG (JTAG) ATPG (JTAG) Memory - BIST Memory - BIST VDD-COREVDD-I/OVDD-PLL 1.4V2.35V 2.05V3.45V3.35V 1.6V3.14V 2.0V3.47V 1.5V3.63V SEE Test Flow

8 Continuity Supply Shorts Continuity Functional Verification Monitor Supply Currents SEE Test Flow NO SEL SEL Detection SEU Detection

9 SEU/SEFI Rate Estimation The environment models in CREME96 were used  Solar min & Solar Max for background rates  October 1989 Large Solar Flare for worst 5-minute, worst day, worst week event rates A shielding of 150 mils was assumed All heavy ion rates are for GEO orbit

10 EMIF, McBSP, DMA, Power Down Logic, Data Access Controller, Program/Cache Memory, Data Memory, Boot Modes Tests: 81Vectors: ~1.3 Million Upset Rate: 4.0E-03 upsets/day or ~250 days/upset SEU Characteristics

11 Program/Cache and Data Memory Program Access/Cache Controller and Data Access Controller Tests: 25Vectors: ~97k Upset Rate: 2.88E-04 upsets/day or ~3472 days/upset SEU Characteristics

12 Program/Cache Memory verification using BIST (167 MHz) Upset Rate: 3.47E-05 upsets/day or ~28837 days/upset SEU Characteristics

13 Data Memory verification using BIST (167 MHz) Upset Rate: 1.75E-04 upsets/day or ~5709 days/upset

14 SEU Characteristics CPU Tests: 49Vectors: ~32 Million Upset Rate: 6.24E-04 upsets/day or ~1603 days/upset

15 Summary and Conclusion SMV is not susceptible to SEL up to tested LET of 89 MeV-cm 2 /mg and max temperature of 125 ° C The DSP has an estimated worst-case SEU rate of 4.0E-03 upsets/device-day or ~250 days per upset (GEO orbit) The DSP did not show significant sensitivity to different bias voltages and temperatures

16 Summary and Conclusion (Cont.) The total gamma dose hardness level is 100 krad(Si) SMV is suitable for Space and for all spacecraft orbits (GEO, LEO, etc.) Proton upset rate estimation applicable for LEO orbits is underway


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