Presentation is loading. Please wait.

Presentation is loading. Please wait.

(1) - Camera Electronics - Status and Update on changes since Aug 06 18 July 07 John Oliver and the Camera Electronics team.

Similar presentations


Presentation on theme: "(1) - Camera Electronics - Status and Update on changes since Aug 06 18 July 07 John Oliver and the Camera Electronics team."— Presentation transcript:

1 (1) - Camera Electronics - Status and Update on changes since Aug July 07 John Oliver and the Camera Electronics team

2 (2) Camera Electronics Team & Responsibilies Harvard – C. Stubbs, J. Oliver, N. Felt –Camera Electronics Project Management, Back End Electronics (BEE) Harvard Smithsonian CfA – J. Geary –Camera Electronics & Sensor BNL – V. Radeka, P. O’Connor –Front End Electronics (FEE) overall responsibility, Raft Tower, Sensor U. Penn – M. Newcomer, R. Van Berg –Electronics Systems Engineer (R. Van Berg), FEE OSU – K. Honscheid –Raft to RNA fiber link ORNL/U. Tennessee – C. Britton, N. Ericson, B. Blalock + graduate students –Sensor Control Chip (SCC) Brandeis – J. Bensinger, K. Hashemi –Timing & Control Module (TCM) In2p3 (Paris, Fr) – V. Tocut, H. Lebbolo, P. Antilogus, C. de la Taille, R. Sefri –Analog Signal Processing ASIC (ASPIC)

3 (3) Sensor & Raft packaging issues Packaging issues dictate changes to electronics packaging, but not to functionality Will be fully covered in subsequent talks by Paul O’Connor & Veljko Radeka but summarized below. Sensor package was revisited in ’07 to be more consistent with industry “norms” –This resulted in 3 point trimmable package with thermally conductive posts –Sensor package to be in thermal contact with raft, no thermal straps on sensor packages –Discussed at length in Cryostat workshop at SLAC, April ’07 –Sensor flatness (5 u p-v) may be “overspeced”. Spec will be revisited and reevaluated. –Prototype raft under evaluation (BNL)

4 (4) Science Array Electronics: Conceptual Block Diagram Science Array Electronics Conceptual Design FEE Module -Analog signal processing only; no digital activity -ASIC based clock driving & analog signal processing -~173 K d Timing Bus Data Bus Control interface Control interface BEE card Cryostat wall Fiber driver Raft n+1 Bay n+1 Raft n Bay n BEE Module -A/D conversion using commercial parts -Control / timing signal transmission -Data collection -Data transmission via fiber communication to DAQ (RNA) -“Housekeeping” functions (metadata) ~ -20C – 0C Timing and Control interface -“Engineering” data readout -~ total Cryostat penetrations per raft Data transmission -Single ~2 GB/sec fiber per bay FEE-BEE Cabling -Fully differential signaling only for robust EMI protection -BEE to FEE: Clock signals (LVDS) -FEE to BEE: Preprocessed analog signals differentially driven from FEE 250kHz – 500kHz 3x3 array of CCDs per Raft Tower package

5 (5) Electronics specifications & features Based on 16 segment sensors, 1 mega pixels per segment, 16 mega pixels per CCD Each raft has –9 Sensors –144 CCD segments and readout channels –3,200 readout channels total in focal plane 6 e rms read noise crosstalk Read rate –Target  3 seconds (333k pixels per second) –Goal  2 seconds (500k pixels per second) –Readout will operate between 250 kp/s and 500 kp/s. –Final operating point to be based on performance measurements & trade-off analysis (noise & crosstalk) FEE features –Overall responsibility  BNL / U. Penn –ASIC developments Critical for high packing density (144 independent channels per raft) –Analog signal processing ASIC (ASPIC) »Multiple (e.g. 8) channels of dual slope integrators per chip »Under development by IN2P3 in France »Prototype to be submitted for fabrication summer ’07 »Test & evaluation – 3 rd & 4 th quarters, ‘07 –Sensor control chip »Provides CCD bias levels with programmable levels »Translates logic level clock signals to CCD clock levels (programmable) »2 SCCs per CCD »Under development at ORNL/UT » Prototype to be submitted for fabrication (ATMEL) summer ’07 »Test & evaluation – 3 rd & 4 th quarters, ‘07

6 (6) FEE: Reference Mechanical Design FEE modules are comprised of 3 double-board units –Board units are verified as a set and are replaceable without affecting its neighbors One unit services 3 of 9 sensors on a Raft Unit includes a central thermal plane that is thermally isolated from the boards –This provides mount point for thermal strap from sensor package –It allows the strap to be much shorter, while improving thermal stability Sensor thermal straps are no longer in the baseline. FEE card cage accommodates raft level heat strap FEE Double-Board Unit Sidewalls conduct board heat down to base but are thermally isolated from thermal plane Clamp bars provide clamping force for thermal conduction to sidewalls Base mounts to Cryo Plate along cooled ligaments, separated by slots for FEE-BEE flex cable routing

7 (7) Raft Tower: Needs much revision to reflect new packaging concepts Raft towers are comprised of a Raft and FEE module –They are tested as a set, and verified together –The Tower provides an integral mechanical assembly for transport and integration into the Grid –The Raft and FEE module include temporary support points As the Raft Tower is integrated into the Grid, the Raft lifts off its temporary supports on the FEE module as it is pulled down onto its permanent mounts on the Grid Springs pre-load Raft onto kinematic mounts Raft Tower Assembly 3X V-block kinematic mount to Grid Raft Tower Detail Backside view Temporary mounts to FEE module wall Sensor adjusters are fully accessible for adjustment after FEE module is integrated FEE module sidewalls support Rafts

8 (8) Raft Tower: Design Details require revision to reflect new packaging Raft Tower Front view Sensor package adjuster are accessible after FEE module is fully integrated Raft Tower Side views FEE module end wall Raft and adjuster Thermal strap Board thermal clamp

9 (9) Electronics specifications & features - BEE Features –Overall responsibility  Harvard –144 channels of 16-bit 1 Msps ADCs to be operated between 250 kHz – 500 kHz –BEE controller (FPGA) contains Timing State Machine –50 MHz clock driven timing controller –Fully programmable via compact “configuration files” downloaded from CCS –Typically < lines of code for entire focal plane readout –Rafts can in strict synchronicity across focal plane –All Rafts kept in synch by Timing & Control Module (aka “Raft Controller”) Meta data formatting – Collects and formats all “raft centric” metadata Data fiber to RNA –Responsibility of SLAC/OSU –One ~ 2 Gbps fiber per raft to one RNA input –Sends pixels + metadata to RNA –Duplex fibers for error checking & correction Engineering interface –Interfaces to TCM –Allows stand alone “single raft” operation for set-up and debugging without RNA –Download path for all set-up parameters and timing configuration code –Upload path for optional interrogation of all metadata

10 (10) BEE: Reference Mechanical Design BEE modules provide communications and analog-to-digital conversion –6-board module provides adequate volume for 24 ADC channels Modules are verified as a unit Module mounts to Cold Plate inside Cryostat –Crenulated mounting tabs must be engaged and fastened remotely, to allow for removal and re-integration of a module with its neighbors in place BEE Module on Cold Plate Front-side view Crenulations in sidewalls allow for remote and independent mounting to Cold Plate BEE Module BEE ADC Card 6 ADC boards per Raft Connectors for FEE-BEE flex cables Card-lok thermal clamps Back-plane connection 2 back-plane boards for communications and fiber driver End walls support boards and transport heat

11 (11) Timing & Control Module Responsibility of Brandeis University Resides outside cryostat but within camera body. Exact location TBD Functionality –Sole control interface between CCS and all Raft BEE packages –CCS connection – Ethernet/TCPIP –Fanout to 25 Rafts via 8-10 wire custom protocol (4-5 LVDS pairs) –Maintains “Master Clock” (50 MHz) to fan out to all Rafts –Download of Timing Configuration files –Download of all setup parameters (example : raft heater temp trims, etc) –Sends “Execute” commands to initiate all Raft Read sequences in strict synchronicity Implementation –PC104 based –At least one custom board with programmable logic to implement synchronous control and fanout to rafts


Download ppt "(1) - Camera Electronics - Status and Update on changes since Aug 06 18 July 07 John Oliver and the Camera Electronics team."

Similar presentations


Ads by Google