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EE141 Adder Circuits S. Sundar Kumar Iyer

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Acknowledgement Slides taken from which is the web-site of “Digital Integrated Circuit – A Design Perspective” by Rabaey, Chandrakasan, Nicolic

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Outline Background / Basics of Adders Ripple Carry Adder

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**A Generic Digital Processor**

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**Building Blocks for Digital Architectures**

Arithmetic unit - Bit-sliced datapath (adder, multiplier, shifter, comparator, etc.) Memory - RAM, ROM, Buffers, Shift registers Control - Finite state machine (PLA, random logic.) - Counters Interconnect - Switches - Arbiters - Bus

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Bit-Sliced Design

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Bit-Sliced Datapath

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**Itanium Integer Datapath**

Fetzer, Orton, ISSCC’02

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Full-Adder

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The Binary Adder

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**Express Sum and Carry as a function of P, G, D**

Define 3 new variable which ONLY depend on A, B Generate (G) = AB Propagate (P) = A Å B Delete = A B Can also derive expressions for S and C based on D and P o Note that we will be sometimes using an alternate definition for Propagate (P) = A + B

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**The Ripple-Carry Adder**

Worst case delay linear with the number of bits td = O(N) tadder = (N-1)tcarry + tsum Goal: Make the fastest possible carry path circuit

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**Complimentary Static CMOS Full Adder**

28 Transistors

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Inversion Property

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**Minimize Critical Path by Reducing Inverting Stages**

Exploit Inversion Property

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**A Better Structure: The Mirror Adder**

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Mirror Adder Stick Diagram

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The Mirror Adder The NMOS and PMOS chains are completely symmetrical. A maximum of two series transistors can be observed in the carry- generation circuitry. When laying out the cell, the most critical issue is the minimization of the capacitance at node Co. The reduction of the diffusion capacitances is particularly important. The capacitance at node Co is composed of four diffusion capacitances, two internal gate capacitances, and six gate capacitances in the connecting adder cell . The transistors connected to Ci are placed closest to the output. Only the transistors in the carry stage have to be optimized for optimal speed. All transistors in the sum stage can be minimal size.

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**Transmission Gate Full Adder**

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**Manchester Carry Chain**

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**Manchester Carry Chain**

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**Manchester Carry Chain**

Stick Diagram

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Carry-Bypass Adder Also called Carry-Skip

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**Carry-Bypass Adder (cont.)**

tadder = tsetup + Mtcarry + (N/M-1)tbypass + (M-1)tcarry + tsum

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**Carry Ripple versus Carry Bypass**

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Carry-Select Adder

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**Carry Select Adder: Critical Path**

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Linear Carry Select

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**Square Root Carry Select**

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**Adder Delays - Comparison**

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LookAhead - Basic Idea

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Look-Ahead: Topology Expanding Lookahead equations: All the way:

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**Logarithmic Look-Ahead Adder**

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Carry Lookahead Trees Can continue building the tree hierarchically.

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Tree Adders 16-bit radix-2 Kogge-Stone tree

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Tree Adders 16-bit radix-4 Kogge-Stone Tree

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Sparse Trees 16-bit radix-2 sparse tree with sparseness of 2

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Tree Adders Brent-Kung Tree

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Example: Domino Adder Propagate Generate

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Example: Domino Adder Propagate Generate

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Example: Domino Sum

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