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1 New instructions in a z/series Who is this:Martin Trübner from:Langen, Germany This presentation is available at:pi-sysprog.de/wavv10.

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Presentation on theme: "1 New instructions in a z/series Who is this:Martin Trübner from:Langen, Germany This presentation is available at:pi-sysprog.de/wavv10."— Presentation transcript:

1 1 New instructions in a z/series Who is this:Martin Trübner from:Langen, Germany email:martin@pi-sysprog.de This presentation is available at:pi-sysprog.de/wavv10 This was prepared and presented first by Dan Greiner for SHARE 2009/08

2 2 Topics du Jour:  Facilities Added Since the Introduction of z/Architecture in 2000: ►z900 (2064) and z800 (2066): ►z990 (2084) and z890 (2086): ►z9-109 (2094)  Why the new facilities were implemented  Only CPU facilities discussed, not I/O

3 3 New Facilities in the Z800 & Z900:  Extended-Translation Facility 2 (October 2000)  HFP Multiply-and-Add / Subtract Facility (October 2001)  Long-Displacement Facility (May 2002) ►Reduced-Performance Version

4 4 New Facilities in the Z800 & Z900 - Extended-Translation Facility 2:  Performs operations on double-byte, ASCII, and decimal data.  Provides support for manipulation of Unicode strings.  Includes the following instructions: NameMne- monic Op- code COMPARE LOGICAL LONG UNICODECLCLUEB8F MOVE LONG UNICODEMVCLUEB8E PACK ASCIIPKAE9 PACK UNICODEPKUE1 TEST DECIMALTPEBC0 TRANSLATE ONE TO ONETROOB993 TRANSLATE ONE TO TWOTROTB992 TRANSLATE TWO TO ONETRTOB991 TRANSLATE TWO TO TWOTRTTB990 UNPACK ASCIIUNPKAEA UNPACK UNICODEUNPKUE2

5 5 New Facilities in the Z800 & Z900 - HFP Multiply-and-Add / Multiply-and-Subtract Facility:  Provides improved performance for hexadecimal floating-point numbers  May be used in place of MULTIPLY followed by ADD (or SUBTRACT)  Key to many improved mathematics functions  Includes the following instructions: NameMne- monic Op- code MULTIPLY AND ADDMADED3E MULTIPLY AND ADDMADRB33E MULTIPLY AND ADDMAEED2E MULTIPLY AND ADDMAERB32E MULTIPLY AND SUBTRACTMSDED3F MULTIPLY AND SUBTRACTMSDRB33F MULTIPLY AND SUBTRACTMSEED2F MULTIPLY AND SUBTRACTMSERB32F

6 6 New Facilities in Z800 & Z900 - Long-Displacement Facility (1):  Exploits previously-unused byte in RXE-format opcode: ►RXE-format introduced with binary-floating point in ESA/390 ►RXE (and RSE) used extensively to implement z/Architecture opcodes (e.g., 64-bit instructions) ►Bits 32-39 of the instruction reserved in the new formats OpCodeR1R1 X2X2 B2B2 D2D2 081216203240 47 / / / /

7 7 New Facilities in Z800 & Z900) - Long-Displacement Facility (2):  Extends 12-bit unsigned displacement to 20-bit signed displacement: ►RSY: ►RXY: ►SIY: OpCodeR1R1 R3R3 B2B2 D2D2 081216203240 47 OpCodeR1R1 X2X2 B2B2 D2D2 081216203240 47 OpCodeI2I2 B1B1 D1D1 0816203240 47 DH 2 DH 2 DH 1 DL 2 DL 2 DL 1

8 8 New Facilities in Z800 & Z900 - Long-Displacement Facility (3):  Operand displacement-low field (DL) concatenated with displacement-high field (DH) ►Forms 20-bit signed displacement ►Bit 32 of the instruction is the sign bit OpCodeR1R1 R3R3 B2B2 DL 2 DH 2 OpCode 081216203240 47 20-Bit Signed Displacement

9 9 New Facilities in Z800 & Z900 - Long-Displacement Facility (4):  All RSE- and RXE-format instructions with primary opcode of E3 and EB changed to RSY and RXY format, respectively ►69 z/Architecture instructions converted (64-bit operations) ►Floating-point ops not converted ►Decimal ops not converted ►No change to mnemonics  45 New RSY, RXY, and SIY-format instructions ►Most extend ESA/390-compatible 32-bit instructions ►Mnemonic suffixed with “Y” to indicate long displacement –Example: New operation “LY” is analog to “L”

10 10 New Facilities in Z800 & Z900 - Long-Displacement Facility (5):  Advantages of long displacement ►Reduce the number of base registers required to address data ►Allows for non-zero-based structures –Structures with prefix –Certain stack models ►Opportunity for significant performance improvement –Packing chained structured together –Reduced address-generation interlocks (AGI)  WARNING: Performance of long-displacement facility on Z800 & Z900 is suboptimal!

11 11 New Facilities in Z890 / z990:  DAT-Enhancement Facility 1 (June 2003)  High-Performance Long-Displacement Facility (June 2003)  Message-Security Assist (June 2003) ►Five new instructions ►Five query functions ►Two functions for message digest based on secure hash algorithm (SHA-1) ►Data-encryption-algorithm (DEA) facility ►More to follow in future machines

12 12 New Facilities in Z890 / z990: DAT-Enhancement Facility 1:  INVALIDATE DAT TABLE ENTRY (IDTE) ►Provides analog to IPTE, but at the region- and segment-table-entry level. ►Invalidation-and-clearing operation –Selectively invalidates region- or segment-table entries –Selectively clears TLBs CRSTEs and PTEs on all CPUs ►Clearing by ASCE operation –Selectively clears TLB CRSTEs and PTEs on all CPUs  COMPARE AND SWAP AND PURGE (CSPG) ►64-Bit version of CSP ►If comparison is true, TLBs and/or ALBs on all CPUs are purged

13 13 New Facilities in Z890 & Z990 - Message-Security Assist:  Based on industry- standard DEA  Nine functions for ciphering messages, with or without chaining  Generates message- authentication code using 56-, 112-, and 168-bit keys (64, 128, & 192 bits with parity) NameMne- monic Op- code CIPHER MESSAGEKMB92E CIPHER MESSAGE WITH CHAININGKMCB92F COMPUTE INTERMEDIATE MESSAGE DIGEST KIMDB93E COMPUTE LAST MESSAGE DIGESTKLMDB93F COMPUTE MESSAGE AUTHENTICATION CODE KMACB91E

14 14 New Facilities in z890 & z990 GA3:  Extended-translation facility 3 (May 2004) ►Performs operations on Unicode and Unicode- Transformation-Format (UTF) characters ►Provides right-to-left TRT  ASN-and-LX-reuse facility (May 2004) ►Allows safe reuse of ASN ►Expands PC Number NameMne- monic Op- code CONVERT UTF-16 TO UTF-32CU24B9B1 CONVERT UTF-32 TO UTF-16CU42B9B3 CONVERT UTF-32 TO UTF-8CU41B9B2 CONVERT UTF-8 TO UTF-32CU14B9B0 SEARCH STRING UNICODESRSTUB9BE TRANSLATE AND TEST REVERSEDTRTRD0 NameMne- monic Op- code EXTRACT PRIMARY ASN & INSTANCEEPAIRB99A EXTRACE SECONDARY ASN & INSTANCE ESAIRB99B PROGRAM TRANSFER W / INSTANCEPTIB99E SET SECONDARY ASN W / INSTANCESSAIRB99F

15 15 New Facilities in z9-109:  Compare-and-swap-and-store facility  Conditional-SSKE facility  DAT-Enhancement Facility 2 (LPTEA)  Decimal-floating-point facilities  ETF2-enhancement facility  ETF3-enhancement facility  Extended-immediate facility  Extract-CPU-time facility  HFP-unnormalized extension  Message-security-assist extension 1  Move-with-optional-specifications facility  Store-clock-fast facility  Store-facility-list-extended facility  TOD-clock-steering facility

16 16 New Features in z9-109 GA2 - Compare-and-Swap-and-Store Facility:  Current PERFORM LOCKED OPERATION (PLO) provides compare-and-swap-and-store function ►But it’s incompatible with other compare-and-swap operations ►PLO doesn’t do compare-and-swap as interlocked update  z/OS Development requested CSST function that’s compatible with other compare-and-swaps ►New instruction performs block-concurrent interlocked- update compare-and-swap followed by store ►Single, uninterruptible instruction

17 17 New Features in z9-109 GA3 - Conditional-SSKE Facility:  Classic SET STORAGE KEY EXTENDED (SSKE): ►Requires that a new storage key is broadcast to all CPUs in the configuration before instruction completes - For maintenance of TLB entries ►Broadcast can take hundreds of cycles ►Not required in all cases  Conditional SSKE adds new optional M 3 control field ►Allows conditional setting of only change or reference bit (so long as the rest of the key matches) ►Business as usual if M 3 field is zero (ensures compatibility) ►Potential for significant performance improvement in systems that reassign page frames frequently

18 18 New Features in z9-109 - DAT-Enhancement Facility 2:  LOAD PAGE TABLE ENTRY ADDRESS (LPTEA) ►Given a valid virtual address in R 2, return the 64-bit real address of the corresponding page-table entry in R 1. ►M 4 field controls address-space control used to perform translation: –Primary, –AR-specified, –Secondary, –Home, or –PSW-specified ►CC indicates whether segment is protected (PTE is not inspected). ►Exceptions similar to those of LOAD REAL ADDRESS

19 19 New Features in z9-109 GA2 - Decimal Floating Point (1):  Why decimal floating point? Why decimal floating point? ►Given the normal supply of fingers, most people have a very particular affinity for base-10 arithmeticGiven the normal supply of fingers, most people have a very particular affinity for base-10 arithmetic ►Imprecise binary representation of common decimal fractions (like 1 / 10 )Imprecise binary representation of common decimal fractions (like 1 / 10 ) ►Accurate conversions between decimal and hex/binary is trickyAccurate conversions between decimal and hex/binary is tricky –Rounding even trickierRounding even trickier ►Emerging standard, expected to have impact on web applicationsEmerging standard, expected to have impact on web applications  What’s needed? What’s needed? ►Intuitive arithmeticIntuitive arithmetic ►Exact representation of most decimal numbersExact representation of most decimal numbers ►Better handling of roundingBetter handling of rounding ►Handle integers, fixed point, and floating pointHandle integers, fixed point, and floating point

20 20 New Features in z9-109 GA2 - Decimal Floating Point (2):  DFP number representation: ► value = (-1) sign x coefficient x 10 exponent  Truly bizarre encoding: ►Sign (S) ►Combination field (CF) –Two bits of biased exponent –Leftmost digit (LMD) of coefficient –Encoding of Infinity and Not-a-Number (NaN) –All mashed into 5 bits ►Biased exponent continuation field (BXCF) –Remainder of biased exponent –Includes controls for quiet or signaling NaNs –Size depends on precision ►Coefficient continuation field (CCF) –Remaining portion of the coefficient –Size depends on precision

21 21 New Features in z9-109 GA2 - Decimal Floating Point (2):  Short Format:  Long Format:  Extended Format:  Coefficient-continuation field encoded with 3 decimal digits in 10 bits SCFBXCFCCF 01614 63 SCFBXCFCCF 01612 31 SCFBXCFCCF 01618 127

22 22 New Features in z9-109 GA2 - Decimal Floating Point (3):  Summary of DFP Formats PropertyShortLongExtended Format length (bits)3264128 Combination length (bits)111317 Encoded trailing significand length (bits)2050110 Precision (digits), p71634 Maximum left-units-view (LUV) exponent (Emax)963846144 Minimum left-units-view (LUV) exponent (Emin)-95-383-6143 Left-units-view (LUV) bias953836143 Maximum right-units-view (RUV) exponent (Qmax)903696111 Minimum right-units-view (RUV) exponent (Qmin)-101-398-6176 Right-units-view (RUV) bias1013986176 Maximum biased exponent19176712,287 Largest (in magnitude) normal number, Nmax(10 7 – 1) x 10 90 (10 16 – 1) x 10 369 (10 34 – 1) x 10 6111 Smallest (in magnitude) normal number, Nmin1 x 10 -95 1 x 10 -383 1 x 10 -6143 Smallest (in magnitude) subnormal number, Dmin1 x 10 -101 1 x 10 -398 1 x 10 -6176

23 23 New Features in z9-109 GA2 - Decimal Floating Point (4):  DFP Facility: ►54 problem-state instructions for: –Adding –Comparing to / from fixed, signed BCD, unsigned BCD –Converting –Dividing –Extracting exponent, significance –Loading and testing, lengthening, rounding –Multiplying –Quantizing –Shifting –Subtracting –Testing data classes –Testing data groups

24 24 New Features in z9-109 GA2 - Decimal Floating Point (5):  Control via: ►Additional-floating-point (AFP) control (CR0.45) ►Floating-point-control (FPC) register –New DFP rounding-mode control with 8 options.  z9-109 implementation done in Firmware (with hardware assists) ►Compared to web-based emulations written in C (or Java), performance is superior. ►All-hardware implementation planned for future systems

25 25 New Features in z9-109 GA2 - DFP Support Facilities:  DFP Rounding Facility: ►SET DFP ROUNDING MODE instruction (and associated rounding modes in FPC register).  Floating-Point-Support-Sign-Handling Facility: ►COPY SIGN ►LOAD COMPLEMENT ►LOAD NEGATIVE ►LOAD POSITIVE  FPR-GR-Transfer Facility: ►LOAD FPR FROM GR ►LOAD GR FROM FPR  IEEE-Exception-Simulation Facility: ►SET FPC AND SIGNAL ►LOAD FPC AND SIGNAL

26 26 New Features in z9-109 GA3 - PERFORM FLOATING-POINT OPERATION:  Converts floating point number from/to any of the following ►BFP shortDFP shortHFP short ►BFP longDFP longHFP long ►BFP extendedDFP extendedHFP extended (54 possibilities)  Provides exception controls for: ►IEEE inexact suppression ►IEEE alternate exception action (overflow & underflow) ►HFP overflow / underflow ►DFP preferred-quantum  Provides rounding controls for: ►Round according to current DFP or BFP rounding mode ►Round to nearest with ties to even / zero / away from zero ►Round towards or away from zero ►Round towards + or – infinity ►Round to prepare for shorter precision

27 27 New Features in z9-109 - ETF2-Enhancement Facility:  Extended-translation facility 2 added TROO, TROT, TRTO and TRTT instructions. ►For all 4 instructions, a comparison to a test character is performed (e.g., NULL) ►Translation stops if test character is reached. ►For TRTO and TRTT, the translation table must be on a 4K-byte boundary –Tables are 64K and 128K, respectively.  ETF2-enhancement facility: ►Adds optional M 3 field to TRxx instructions (changes format from RRE to RRF) ►Business as usual when M 3 is zero (ensures compatibility) ►Allows test-character comparison to be optionally bypassed ►Aligns translation table for all 4 ops on a doubleword (regardless of M 3 )

28 28 New Features in z9-109 - ETF3-Enhancement Facility:  Original Extended-Translation Facility and Extended-Translation Facility 3 (ETF3) provided Unicode conversion instructions. ►Conformed to Unicode Standard 2.0 when designed ►Allowed certain ill-formed characters in favor of performance ►Unicode Standard 4.0 no longer condones ill-formed characters.  ETF3-Enhancement: ►Adds program control to CU12, CU14, CU21, and CU24 to require full well-formedness checking ►Optional M 3 operand in the instruction ►Business as usual when M 3 is zero (ensures compatibility) ►When the M 3 flag is 1, full well-formedness checking performed –Performance likely to be degraded

29 29 New Features in z9-109 - Extended-Immediate Facility (1):  Adds numerous 32-bit immediate-operand instructions ►ADD IMMEDIATE (AFI, AGFI) ►ADD LOGICAL IMMEDIATE (ALFI, ALGFI) ►AND IMMEDIATE (NIHF, NILF) ►COMPARE IMMEDIATE (CFI, CGFI) ►COMPARE LOGICAL IMMEDIATE (CLFI, CLGFI) ►EXCLUSIVE OR IMMEDIATE (XIHF, XILF) ►INSERT IMMEDIATE (IIHF, IILF) ►LOAD IMMEDIATE (LGFI) ►LOAD LOGICAL IMMEDIATE (LLIHF, LLILF) ►OR IMMEDIATE (OIHF, OILF) ►SUBTRACT LOGICAL IMMEDIATE (SLFI, SLGFI)  Minimizes need for DCs or literal pool for constant values.

30 30 New Features in z9-109 - Extended-Immediate Facility (2):  Adds numerous miscellaneous instructions ►FIND LEFTMOST ONE (FLOGR) ►LOAD AND TEST (LT, LTG) –Adds RXE-format to existing RR- and RRE-formats. ►LOAD BYTE (LBR, LGBR) –Adds RRE format to existing LB and LGB ►LOAD HALFWORD (LHR, LGHR) –Adds RRE format to existing LH and LGH ►LOAD LOGICAL CHARACTER (LLC, LLCR, LLGCR) –Adds 32-bit RXY-format, and 32- and 64-bit RRE-formats ►LOAD LOGICAL HALFWORD (LLH, LLHR, LLGHR) –Adds 32-bit RXY-format, and 32- and 64-bit RRE-formats  Advantages: ►Fewer storage references ►Smaller code image

31 31 New Features in z9-109 GA2 - Extract-CPU-Time Facility:  Original STORE CPU TIMER (STPT) is a privileged instruction ►z/OS TIMEUSED service routine: –Extracts CPU timer for problem-state programs –Takes hundreds of CPU cycles (PC, lock, disable, observe, enable, unlock, PR) –Significantly skews measurements  EXTRACT CPU TIME (ECTG) instruction: ►Problem-state instruction ►Can provide most data provided by TIMEUSED ►Substantially less overhead ►May facilitate better measurement of module flow, instruction sequences, micro-accounting, &c. ►Requires access to SCP-maintained fields: –Task-time used –CPU timer at last dispatch –Scaling factor for secondary CPUs.

32 32 New Features in z9-109 - HFP Unnormalized Extension:  Adds unnormalized versions of MULTIPLY and MULTIPLY AND ADD to hexadecimal floating point  Useful in multi-precision and crypto applications  All are RRF-format ops. NameMne- monic Op- code MULTIPLY UNNORMALIZEDMYRB33B MULTIPLY UNNORMALIZEDMYHRB33D MULTIPLY UNNORMALIZEDMRLRB339 MULTIPLY UNNORMALIZEDMYED3B MULTIPLY UNNORMALIZEDMYHED3D MULTIPLY UNNORMALIZEDMYLED39 MULTIPLY AND ADD UNNORMALIZEDMAXWRB33A MULTIPLY AND ADD UNNORMALIZEDMAWRB33C MULTIPLY AND ADD UNNORMALIZEDMAYWRB338 MULTIPLY AND ADD UNNORMALIZEDMAXWED3A MULTIPLY AND ADD UNNORMALIZEDMAWED3C MULTIPLY AND ADD UNNORMALIZEDMAYWED38

33 33 New Features in z9-109 - Message-Security-Assist Extension 1:  Adds two 256-bit secure-hash-algorithm (SHA) functions: ►COMPUTE INTERMEDIATE MESSAGE DIGEST ►COMPUTE FINAL MESSAGE DIGEST  Adds two 128-bit advanced-encryption-standard (AES) functions: ►CIPHER MESSAGE WITH CHAINING ►CIPHER MESSAGE (sans chaining)  Adds 64-bit pseudo-random-number-generation facility ►CIPHER MESSAGE WITH CHAINING  All are extensions to message-security assist added in z990 GA1.

34 34 New Features in z9-109 GA2 - Move-with-Optional-Specifications Facility:  MVCOS provides über MOVE CHARACTER ►True length specified in a register (no need for EXECUTE) ►Moves up to 4K in one execution ►Moves from any address-space control (ASC) to any other ►Moves from any key to any other ►Key and ASC for source and destination may be explicitly program- specified or use current-PSW values ►May be faster than MOVE LONG for 4K-byte moves, but … ►Will likely be slower than executed MVC for < 256-byte move.  Equivalent to MVCP, MVCS, MVCDK, MVCSK, MVCK ►Except the above are limited to 256 bytes; MVCOS is not. ►Available to problem-state code (subject to PSW key mask)

35 35 New Features in z9-109 - Store-Clock-Fast Facility (1):  Current architecture for STORE CLOCK requires: ►Unique, monotonically-advancing 64-bit TOD value stored by each CPU. ►Same value may not be stored twice ►Uniqueness guaranteed by placing CPU number in rightmost bits  In prior machines, cycle time was slow enough that rightmost “ticking” bit of clock did not collide with CPU number. ►In future CPUs, ticking bit of clock will collide with CPU number –Currently (z9-109) TOD bit 57 is the ticker –Future CPU numbers may require > 6 bits! ►To guarantee monotonic advancement, the result of STORE CLOCK (STCK) must be delayed (potentially > 100 cycles) –Partly due to uniqueness issue –Partly due to inter-processor signaling in MP environment

36 36 New Features in z9-109 - Store-Clock-Fast Facility (2):  STORE CLOCK FAST allows storing of full-resolution 64- bit clock ►Same clock value may be seen by the same or other CPUs multiple times. ►Should be used only by applications that can tolerate it –Duplicate time stamps means exact sequence cannot be determined in an MP environment! ►STCKF (B27C hex) can replace STCK (B205 hex)  TRACE instruction can also use STCKF format ►Subject to control register 0, bit 32.  Facility is not required if program switches to STORE CLOCK EXTENDED and TRACE (TRACG)

37 37 New Features in z9-109 - Store-Facility-List-Extended Facility:  Original z/Architecture STORE FACILITY LIST (STFL): ►Stores a list of facility bits at real location 200 (C8 hex) ►Privileged operation (supervisor state) ►Inaccessible unless SCP maps real 0 to virtual 0 – Z/OS does –z/VSE does – Linux doesn’t ►Limited to 32 facilities (one word – potentially extendable)  STORE FACILITY LIST EXTENDED (STFLE) ►General instruction (problem state) ►Stores the results in a program-specified location and length ►Up to 16,384 facilities may be indicated ►Maps the first 32 facilities the same as STFL

38 38 New Features in z9-109 - TOD-Clock-Steering Facility:  Semi-privileged facility provides support for the Server Time Protocol (STP)  PERFORM TIMING FACILITY FUNCTION (PTFF) instruction  Multiple functions based on code in GR0: ►Query available functions ►Query TOD offset ►Query steering information ►Adjust TOD offset ►Set TOD offset ►Set fine steering rate ►Set gross steering rate

39 39 Exploitation of New Facilities (1):  How do I know if a facility is installed? ►Facility indications stored by STFLE or STFL BitMeaning 0“N3” instructions installed 1 vz/Architecture installed 2 vz/Architecture active 3DAT-enhancement installed 4IDTE selective segment clearing 5IDTE selective region clearing 6ASN-and-LX-reuse installed 7STFLE installed 8 vEnhanced DAT installed 9Sense-running-status installed 10Conditional-SSKE installed 16Extended-translation 2 installed 17Message-security assist inst. 18Long displacement installed 19Long displacement high perf. 20HFP Mult-and-Add/Sub installed BitMeaning 21Extended-immediate installed 22Extended-translation 3 installed 23HFP-unnormalized-ext. inst. 24ETF2-enhancement installed 25STCKF installed 27MVCOS installed 28TOD-clock steering installed 30ETF3-enhancement installed 31ECTG installed 32*CSST installed 41*FP-support-enhancements inst. 42*DFP installed 43*DFP high performance 44*PFPO installed * Note, STFL cannot store beyond bit 31 v=have names in z/VSE

40 40 Loc Object Code Addr1 Addr2 Stmt Source Statement 000000 00000 00038 28 TESTCASE CSECT R:0 00000 30 USING PSA,0 000000 E310 0048 0004 00048 31 LG 1,FLCCVT2-4 000006 9110 00CA 000CA 32 TM FLCFACL2,FLCFLDHP 00000A A7E4 0006 00016 33 JNO OLD_SCHOOL R:1 00100 34 USING CVTMAP,1 00000E E3F0 1FD8 FF04 000D8 35 LG 15,CVTPRODN 000014 07FE 36 BR 14 37 DROP 1 000016 38 OLD_SCHOOL DS 0H 000016 A71B FF00 FFFF00 39 AGHI 1,-256 R:1 00000 40 USING CVTFIX,1 00001A E3F0 10D8 0004 000D8 41 LG 15,CVTPRODN 000020 07FE 42 BR 14 Exploitation of New Facilities (2) – Long-Displacement - Prefixed Structures (z/OS): Old way New way Extra

41 41 Exploitation of New Facilities (3) – Long-Displacement – Restructuring Linked Blocks: Base Reg Block 1 @Block2 Block3 STUFF Block2 @Block3 STUFF Blocks 1-3 @Block2 Base Reg 12-Bit Dispacement LG 1,@Block1 USING Block1,1 LG 2,@Block2 USING Block2,2 LG 3,@Block3 USING Block3,3 LG 4,STUFF 20-Bit Displacement LG 1,@Block1 USING Block1,1 LG 4,STUFF

42 42 Exploitation of New Facilities (4) – Extended-Immediate Facility: Without Extended ImmediateWith Extended Immediate SG R2,=FD’12345678’ AGFI R2,-12345678 LG R5,678(R9,R10) LTGR R5,R5 LTG R5,678(R9,R10) SLLG R1,R1,48 SRAG R1,R1,48 LGHR R1,R1 XG R5,=X'00000000000000FF' LLGCR R5,R5 LG R0,=X’8000000000000000’ LGHI R2,R0 LOOP LTGR R1,R0 JZ DONE NGR R1,R4 JNZ DONE SRLG R0,R0,1 AGHI R2,1 J LOOP DONE LGR R3,R4 XGR R3,R1 FLOGR R2,R4

43 43 Exploitation of New Facilities (5) – Timing-Related Functions:  STORE CLOCK FAST (STCKF) ►If you do not require monotonically-advancing TOD-clock value, replace STCK with STCKF –Reassemble –Zap –Conditionally alter STCKs  EXTRACT CPU TIME (ECTG) ►z/OS TIMEUSED macro can branch-enter service routine that will execute ECTG. –Either conditionally, depending on availability, or –Always issue ECTG. ►Where TIMEUSED is not available, or where branch-entry to z/OS TIMEUSED service is still too expensive, ECTG may be coded inline –Requires intimate knowledge of O/S task-timing structures.

44 44 Summary:  Numerous facilities have been added to z/Architecture since its introduction in 2000: ►DAT enhancements (1 & 2) ►Decimal Floating Point (and support facilities) ►Extended Immediate ►HFP Multiply-and-Add (normalized / unnormalized) ►Long Displacement ►Message Security Assist ►Timing facilities (ECTG, PTFF, STCKF) ►&c (CSST, C-SSKE, STFLE, MVCOS)  Exploitation of these facilities requires modest to substantial program development.  Significant performance benefits may be realized from careful implementation of these facilities.

45 45 Questions?

46 46 New instructions in a z/series Who is this:Martin Trübner from:Langen, Germany email:martin@pi-sysprog.de This presentation is available at:pi-sysprog.de/wavv10 This was prepared and presented first by Dan Greiner for SHARE 2009/08 Original Name in SHARE: S1290........and there is S1291


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