Presentation on theme: "Aug 20071 Data/Clock Synchronization Fourteen ways to fool your synchronizer Ginosar, R.; Asynchronous Circuits and Systems, 2003. Proceedings. Ninth International."— Presentation transcript:
Aug Data/Clock Synchronization Fourteen ways to fool your synchronizer Ginosar, R.; Asynchronous Circuits and Systems, Proceedings. Ninth International Symposium on12-15 May 2003 Page(s): Digital Object Identifier /ASYNC
Aug Metastability If a data input to a latch/flip-flop does not meet setup/hold time requirement, output of latch/FF can become metastable (enter state between 0 and 1 for indeterminate period of time). When latching ASYNCHRONOUS data (data not synchronized to your clock), have to protect against this condition
Aug Two-flop Synchronizer Very safe synchronizer, but takes two clocks to receive data (long latency)
Aug Mean Time Between Failures for 2-flop Synchronizer tau – settling time constant of FF T – settling window – time between the two clock inputs to the two flops (clock period generally) Tw – parameter related to time window of susceptibility F A – synchronizer’s clock frequency F D – frequency of pushing data across the clock boundary MTBF is generally many EONS for 2-flop sync.
Aug Metastability numbers For 0.18 u process... Tw = 50 ps, tau = 10 ps, assume Fa = 200 Mhz, and data exchanged every 10 clock periods, then MTBF = e 500 / (2 * 10 5 ) = years. The age of the universe is years, so you should be safe.....
Aug Ignoring Metastability If you ignore metastablity, how often to does it occur? For 0.18 u process... Enter metastablity at rate of Tw x Fd x Fc Tw is about 50 ps, assume Fc = 200 MHz, and new data is sent every 1000 clock cycles (2000/sec = Fd), then get two metastability events per millisecond!