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University of Tehran 1 Microprocessor System Design Omid Fatemi 8088 Microprocessor

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Presentation on theme: "University of Tehran 1 Microprocessor System Design Omid Fatemi 8088 Microprocessor"— Presentation transcript:

1 University of Tehran 1 Microprocessor System Design Omid Fatemi 8088 Microprocessor

2 University of Tehran 2 Outline Moore’s law 80x86 history Pin configuration Minimal / Maximal mode Address latch enable Bi-directional data bus

3 University of Tehran 3 Computer modules CPU Memory (RAM, ROM) Peripherals (IO) Data Bus Control Bus Address Bus Keyboard Monitor Printer Mouse Microphone Disk

4 University of Tehran 4 Intel’s Microprocessors and Moore’s law ModelYear IntroducedClock RateTransistor s per chip MHz2, MHz3, MHz5, *5 MHz29, *6 MHz120, ™ processor1985 **16 MHz275, ™ DX processor1989 **26 MHz1,180,000 Pentium® processor1993 ***60 MHz3,100,000 Pentium II processor1997 ***233 MHz7,500,000 Pentium III processor1999 ***450 MHz24,000,00 0 Pentium 4 processor backgrnd/30thann_funfacts.htm 2000 ***1500 MHz42,000,00 0

5 University of Tehran 5 From Intel Site Today, there are 40 microprocessors in the average middle-class American household. The number increases to 50 when a PC and all the surrounding paraphernalia are added. 1 These microprocessors are hidden in bathroom scales with digital readouts, irons with automatic shutdown switches and even the common electronic toothbrush that possesses some 3,000 lines of computer code. 1 Today's automobiles have, on average, more than 50 microprocessors controlling things such as air bags, brakes, engines, windows, door locks and cruise control. 2 Developed during the 1970s, the microprocessor became most visible as the central processor of the personal computer. Microprocessors also play supporting roles within larger computers as smart controllers for graphics displays, storage devices, and high- speed printers. However, the vast majority of microprocessors are used to control a broad array of devices from consumer appliances and PC-enhanced toys to satellites orbiting the earth. 3 The microprocessor has made possible the inexpensive hand-held electronic calculator, the digital wristwatch, and the electronic game. Microprocessors are used to control consumer electronic devices, such as the programmable microwave oven and videocassette recorder; to regulate gasoline consumption and antilock brakes in automobiles; and to monitor alarm systems. 3 It all started 30 years ago, November 1971 Intel began development of the first microprocessor in 1969 as part of a project to design a set of chips for a family of programmable calculators from Japanese calculator manufacturer Busicom. Originally, Busicom owned the rights to the microprocessor having paid Intel $60,000. Realizing the potential for the "brain" chip, Intel offered to return the $60,000 in exchange for the rights to the microprocessor design. Busicom agreed and Intel introduced the 4004 to the worldwide market on November 15, The 4004 sold for $200 each. The key to the success of the microprocessor idea was to provide a software programmable device. Prior to the invention of the programmable microprocessor, chips were designed to perform specific "fixed" functions. Today's state-of-the-art Pentium® 4 Processor The latest direct descendant of the 4004 is the Intel® Pentium® 4 processor for desktop personal computers. Today's cutting edge Pentium 4 microprocessor operates at 2 billion cycles per second. It took 28 years to go from a speed of 108,000 cycles per second performance in the 4004 brain chip to1 billion cycles per second (1 gigahertz) with the Intel® Pentium® III processor - and only 18 months to break the 2 gigahertz barrier with the August announcement of the latest Pentium 4 microprocessor. Pentium 4 processor-based personal computers (at price points ranging from under $1,000 to $2,000) are fueling the latest trends in home computing - from digital music and home digital movie making to photo-realistic 3D images and visual environments delivered on and off the net in advanced games, education and shopping experiences.

6 University of Tehran 6 The Microprocessor An integrated circuit with millions of transistors interconnected with very small aluminum wires. Controls and directs activities of the PC Execute stored programs

7 University of Tehran 7 Memory Von Neumann Architecture Data Microprocessor Registers Actual Processor Program Address Lines Data Lines Control Lines

8 University of Tehran 8 The 8086 Family:The Late 1970’s Could address up to 1 mb of memory at a time when other CPU’s could only address 64 kb. The 16 bit external bus too powerful. The 8088 replaced the 8086 and had only an 8 bit external bus The 8088 CPU was the first chip used in IBM’s microcomputers

9 University of Tehran 9 The Family:1983 Wanted to make the 286 backward compatible with the 8088’s. So had 2 modes: –Real mode-less powerful –Protected mode-very powerful »Could access up to 16 mb of memory »Needed a special operating system »But most users only had DOS

10 University of Tehran 10 The 386 DX: 1985 First true 32 bit chip, all buses 32 bits wide Capable of running in real mode, 286 protected mode and its own 386 protected mode In 386 protected mode it had 2 new functions: –Virtual memory- could use hard drive to pretend that computer had up to 4 GB of data! –Virtual bubbles created for DOS

11 University of Tehran 11 The 386 SX:1988 How different from the 386DX? –External data bus reduced to 16 bits –Address bus reduced to 24 bits, which limited memory use to 16 mb –First popular lap tops were based on the 386SX but was called the 386 SL and ran on 3.3 volts

12 University of Tehran 12 The 486DX:1989 How different from the 386 family? –A built in math coprocessor »Performs high math functions –A built in 8K cache on same chip »This was an SRAM cache that stores code read in the past. When the CPU asks for the code again, it doesn’t have to go to DRAM to get it.

13 University of Tehran SX:1991 Same as 486 DX except the math co- processor is disabled.

14 University of Tehran 14 The Pentiums:1993 Had 64 bit external data bus that split internally as 2 dual pipelined 32 bit buses Supported an 8K write through cache for programs Most early pentiums ran at 3.3 volts. This conserved heat. Voltage regulators on the motherboard can decrease voltage

15 University of Tehran 15 Pentiums continued Includes clock doubling through the setting of jumpers Most later Pentuims use SPGA, Standard Pin Grid Array. This allows staggers the pens and allows for higher pen density

16 University of Tehran 16 Pentium Pro(P6):1995 Quad pipelining Dynamic processing On chip L2 cache Uses Socket 8

17 University of Tehran 17 Recent Pentiums:After 1996 MMX- helps with multimedia products Increased multipliers/clocks- 45 multipliers Improved processing- better cache branch predicting Improved superscalar architecture SSE/SSE2 instructions

18 University of Tehran Microprocessor Minimum Mode

19 University of Tehran 19 Pin Configuration

20 University of Tehran 20 Power and Ground Pins Vcc – pin 40 Gnd – pin 1 and 20

21 University of Tehran 21 Address Pins AD0..AD7 A8..A15 A19/S6, A18/S5, A17/S4, A16/S3

22 University of Tehran 22 Data Pins AD0..AD7

23 University of Tehran 23 Control Pins MN/MX’ (input) –Indicates what mode the processor is to operate in READY (input) –When given an input LOW, it will go into a wait state CLK (input) –Provides basic timing for the processor RESET (input) –Causes the processor to immediately terminate its present activity –To reset the microprocessor, this must be HIGH for at least 4 clock cycles

24 University of Tehran 24 Control Pins TEST’ (input) –Connect this to HIGH HOLD (input) –Connect this to LOW HLDA (output)

25 University of Tehran 25 Control Pins INTR (input) –Interrupt request INTA’ (output) –Interrupt Acknowledge NMI (input) –Non-maskable interrupt

26 University of Tehran 26 Control Pins DEN’ (output) –Data Enable –It is LOW when processor wants to receive data or processor is giving out data DT/R’ (output) –Data Transmit/Receive –When HIGH, direction of data lines is from microprocessor to memory/devices –When LOW, direction of data lines is from memory/devices to microprocessor IO/M’ (output) –Device/Memory –When HIGH, microprocessor wants to access I/O Device –When LOW, microprocessor wants to access memory

27 University of Tehran 27 Control Pins RD’ (output) –When LOW, it indicates that the microprocessor is performing a read access WR (output) –When LOW, it indicates that the microprocessor is performing a write access ALE (output) –Address Latch Enable –Provided by the microprocessor to latch address –When this is HIGH, microprocessor is using AD0..AD7, A19/S6, A18/S5, A17/S4, A16/S3 as address lines

28 University of Tehran 28 Clock Signal needed by the microprocessor to synchronize signals ideally a square wave having a constant frequency

29 University of Tehran Signals

30 University of Tehran 30 Providing Clock, Reset, and Ready Signal

31 University of Tehran 31 Minimum Mode

32 University of Tehran 32 Minimum Mode

33 University of Tehran 33 Minimum Mode

34 University of Tehran 34 Minimum Mode MEMORY D7 - D0 A7 - A0 A15 - A8 A19 - A16 RD WR 8088 AD7 - AD0 A15 - A8 A19/S6 - A16/S3 DEN DT / R IO / M RD WR ALE

35 University of Tehran 35 Processor Timing Diagram of 8088 (Minimum Mode) for Memory or I/O Read ALE T1 CLOCK T2T3T4 AD7 - AD0 A15 - A8 A19/S6 - A16/S3 DT/R __ IO/M __ ____ RD DEN ______ A15 - A8 A7 - A0D7 - D0 (from memory) A19 - A16S6 - S3 if I/O ACCESS this is HIGH, if MEMORY ACCESS this is LOW

36 University of Tehran 36 Will the circuit be able to perform memory read? ;assume that initially the values ;of the registers are: ;BX = 1234, DS = 9000 MOV AL, [BX]

37 University of Tehran 37 Processor Timing Diagram of 8088 (Minimum Mode) for Memory or I/O Read ALE T1 CLOCK T2T3T4 AD7 - AD0 A15 - A8 A19/S6 - A16/S3 DT/R __ IO/M __ ____ RD DEN ______ A15 - A8 A7 - A0D7 - D0 (from memory) A19 - A16S6 - S3 if I/O ACCESS this is HIGH, if MEMORY ACCESS this is LOW

38 University of Tehran 38 Minimum Mode MEMORY D7 - D0 A7 - A0 A15 - A8 A19 - A16 RD WR 8088 AD7 - AD0 A15 - A8 A19/S6 - A16/S3 DEN DT / R IO / M RD WR ALE

39 University of Tehran 39 Minimum Mode MEMORY D7 - D0Q7 - Q0 OE LE 74LS373 D7 - D0Q7 - Q0 OE LE 74LS373 D7 - D4Q7 - Q4 OE LE D3 - D0Q3 - Q0 74LS373 GND D7 - D0 A7 - A0 A15 - A8 A19 - A16 RD WR 8088 AD7 - AD0 A15 - A8 A19/S6 - A16/S3 DEN DT / R IO / M RD WR ALE

40 University of Tehran 40 Octal Transparent Latch with 3-State Output

41 University of Tehran 41 Processor Timing Diagram of 8088 (Minimum Mode) for Memory or I/O Read ALE T1 CLOCK T2T3T4 AD7 - AD0 A15 - A8 A19/S6 - A16/S3 DT/R __ IO/M __ ____ RD DEN ______ A19 - A0 from 74LS373 to memory A7 - A0D7 - D0 (from memory) S6 - S3A19 - A16 A19 - A0 from 74LS373 if I/O ACCESS this is HIGH, if MEMORY ACCESS this is LOW A15 - A8

42 University of Tehran 42 Will the circuit be able to perform memory read? ;assume that initially the values ;of the registers are: ;BX = 1234, DS = 9000 MOV AL, [BX]

43 University of Tehran 43 Processor Timing Diagram of 8088 (Minimum Mode) for Memory or I/O Read (with 74373)

44 University of Tehran 44 Minimum Mode What about Data read and write

45 University of Tehran 45 Minimum Mode MEMORY D7 - D0Q7 - Q0 OE LE 74LS373 D7 - D0Q7 - Q0 OE LE 74LS AD7 - AD0 A15 - A8 A19/S6 - A16/ S3 DEN DT / R IO / M RD WR ALE D7 - D4Q7 - Q4 OE LE 74LS373 D3 - D0Q3 - Q0 GND D7 - D0 A7 - A0B7 - B0 E DIR 74LS245 A7 - A0 A15 - A8 A19 - A16 RD WR

46 University of Tehran 46 Processor Timing Diagram of 8088 (Minimum Mode) for Memory or I/O Read (with 74245)

47 University of Tehran 47 Minimum Mode

48 University of Tehran 48 Minimum Mode

49 University of Tehran 49 Minimum Mode

50 University of Tehran 50 Minimum Mode


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