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SUPPLEMENTARY CHAPTER 2 Instruction Addressing Modes The Architecture of Computer Hardware and Systems Software: An Information Technology Approach 3rd.

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Presentation on theme: "SUPPLEMENTARY CHAPTER 2 Instruction Addressing Modes The Architecture of Computer Hardware and Systems Software: An Information Technology Approach 3rd."— Presentation transcript:

1 SUPPLEMENTARY CHAPTER 2 Instruction Addressing Modes The Architecture of Computer Hardware and Systems Software: An Information Technology Approach 3rd Edition, Irv Englander John Wiley and Sons  2003 Linda Senne, Bentley College Wilson Wong, Bentley College

2 Supplementary Chapter 2 Instruction Addressing Modes S2-2 Little Man Computer  Direct, absolute addressing  Direct: data is reached directly from the address in the instruction  Absolute: address in the instruction field is the actual memory location being addressed

3 Supplementary Chapter 2 Instruction Addressing Modes S2-3 Additional Addressing Modes  Programmer-accessible registers  Provide faster execution with register-based instructions  Alternatives to absolute addressing  Allow larger range of addressable memory  While using a reasonable number of bits for the address field  Alternatives to direct addressing  Facilitate writing certain types of programs  Example: loops that use index to address different entries in a table or array

4 Supplementary Chapter 2 Instruction Addressing Modes S2-4 Register Addressing  Does not require a memory access  Faster execution  Implemented directly as part of the CPU  RISC machine instruction set: made up almost entirely of register operation instructions

5 Supplementary Chapter 2 Instruction Addressing Modes S2-5 Register Addressing Fetch-Execute Cycle for Register-to-Register Move 1.PC -> MARTransfer the address from the PC to the MAR 2.MDR -> IRTransfer the instruction to the IR 3.contents(IR[add1]) -> contents(IR[add2]) Move contents of source register to destination register 4.PC + 1 -> PCProgram Counter incremented* *Done in parallel with move; only 3 time units required

6 Supplementary Chapter 2 Instruction Addressing Modes S2-6 Additional Addressing Modes  Programmer-accessible registers  Provide faster execution with register-based instructions  Alternative to absolute addressing  Allow larger range of addressable memory  While using a reasonable number of bits for the address field  Alternative to direct addressing  Facilitate writing certain types of programs  Example: loops that use index to address different entries in a table or array

7 Supplementary Chapter 2 Instruction Addressing Modes S2-7 Active Area of Memory  Code executes in a small area of memory that changes as program proceeds  Well-written code  Small modular subroutines and procedures  Local variables  Conditional branches Fig S2.2

8 Supplementary Chapter 2 Instruction Addressing Modes S2-8 2 Alternatives to Absolute Addressing  Base register addressing  Relative addressing  Both provide starting address and an offset or displacement from the starting point  Starting address in register or program counter  Offset: address in the instruction  Programming advantage: relocatability

9 Supplementary Chapter 2 Instruction Addressing Modes S2-9 Base Register Addressing  Base register set to initial address  Hardware design: special, separate register or general-purpose registers  Generally large to provide large memory space, frequently gigabytes  Final address: contents of instruction address field added to the base address

10 Supplementary Chapter 2 Instruction Addressing Modes S2-10 IBM zSystem  Base register address creation Base Instruction Register = 1395actual location (absolute address in memory)

11 Supplementary Chapter 2 Instruction Addressing Modes S2-11 IBM zSystem  bit general-purpose registers  Load instruction format op codereg #indexbase #displacement bit

12 Supplementary Chapter 2 Instruction Addressing Modes S2-12 IBM zSystem Example: Load  Base-value register: general-purpose register 3 1 C 2 5 E 0 16  Displacement for the instruction 3 7 A 16  Absolute address 1C25E A 16 =1C295

13 Supplementary Chapter 2 Instruction Addressing Modes S2-13 IBM zSystem Example: Load  Instruction Word A Op code Destination register Base register Displacement

14 Supplementary Chapter 2 Instruction Addressing Modes S2-14 Fetch-Execute Cycle for Relative Address 1.PC -> MARTransfer the address from the PC to the MAR 2.MDR -> IRTransfer the instruction to the IR 3.IR[Address] + PC -> MARAddress portion of the instruction added to the PC and loaded into the MAR 4.MDR + A -> AValue in the MDR added to the value of the accumulator 5.PC + 1 -> PCProgram Counter incremented

15 Supplementary Chapter 2 Instruction Addressing Modes S2-15 Relative Addressing  Value in address field added to value in program counter  Program counter used as the base register  Similar to base addressing  Constraint: address field must be able to store and manipulate positive and negative numbers  Complementary representation

16 Supplementary Chapter 2 Instruction Addressing Modes S2-16 Relative Addressing Example Program Counter 4613Instruction 46+3 = 49actual location (absolute address in memory)

17 Supplementary Chapter 2 Instruction Addressing Modes S2-17 Direct Addressing  Separates data into location different from location of instructions  Benefits to programmer  Data can be changed without affecting the instruction itself  Data is available to different instructions

18 Supplementary Chapter 2 Instruction Addressing Modes S2-18 Additional Addressing Modes  Programmer-accessible registers  Provide faster execution with register-based instructions  Alternative to absolute addressing  Allow larger range of addressable memory  While using a reasonable number of bits for the address field  Alternative to direct addressing  Facilitate writing certain types of programs  Example: loops that use index to address different entries in a table or array

19 Supplementary Chapter 2 Instruction Addressing Modes S2-19 Alternatives to Direct Addressing  Immediate addressing  Indirect addressing  Register Indirect addressing  Indexed addressing

20 Supplementary Chapter 2 Instruction Addressing Modes S2-20 Immediate Addressing  Store data with the instruction itself  Example:  Data is a constant  Constraint:  Address field must be able to store and manipulate positive and negative numbers  Complementary representation  Advantage:  Additional memory access not required  Faster execution

21 Supplementary Chapter 2 Instruction Addressing Modes S2-21 Immediate Addressing  Modified LMC Example  Constant limited to the size of address field op codeaddressing modeaddress field 1105 (Load)(the number 05)

22 Supplementary Chapter 2 Instruction Addressing Modes S2-22 Immediate Addressing  Modified LMC Example 1.PC -> MARTransfer the address from the PC to the MAR 2.MDR -> IRTransfer the instruction to the IR 3.IR[Address]-> AMove contents of source register to Accumulator 4.PC + 1 -> PCProgram Counter incremented

23 Supplementary Chapter 2 Instruction Addressing Modes S2-23 Indirect Addressing  Address field of the instruction contains the address of the data  Similar to pointers in Pascal or C  Frequently used with subscripted data in a table Memory addressData Table Subscript 77136TABLE(1) 78554TABLE(2) 79302TABLE(3) :

24 Supplementary Chapter 2 Instruction Addressing Modes S2-24 Little Man Indirect Addressing a. The Little Man reads in instruction b.,,, he finds the address of the data

25 Supplementary Chapter 2 Instruction Addressing Modes S2-25 Little Man Indirect Addressing c. … from that address he retrieves the data d. … with a different address in location 45, he retrieves different data (note: In this step the address of the data has been incremented).

26 Supplementary Chapter 2 Instruction Addressing Modes S2-26 Incrementing  Treat the instruction as data  Modify the address field  Pure code: does not modify itself during execution  Incrementing does not modify the instruction  Address stored in a separate data region  Advantage: program can be stored in ROM

27 MailboxInstructionComments 00LOAD90/this actually loads "ADD 60".. 01STORE07/..into mailbox 07 02LOAD91/initialize the totalizer 03STORE99 04LOAD92/initialize the counter to 19 05STORE98 06LOAD99/load the total 070/[ADD 60, ADD 61, etc.] 08STORE99/and store the new total 09LOAD07/modify the instruction in ADD93/..by adding 1 as though the.. 11STORE07/..instruction were data 12LOAD98 13SUB93/decrement the counter 14STORE98 15BRP06/loop back if not done 16LOAD99/done.. 17OUT/output the result 18HALT 90ADD60/initial data for location /used to hold the current count 99/used to hold the current total Totalizer Loop with Direct Addressing Instruction in location 07 treated as data, incremented, and replaced to its original location

28 MailboxInstructionComments 00LOAD90/this time just the initial.. 01STORE97/..address is saved.. 02LOAD91/as.. 03STORE99 04LOAD92/… 05STORE98 06LOAD99/…before 07ADD *97/this is the indirect instruction 08STORE99 09LOAD97/modify the address in 97 (this is direct).. 10ADD93/..by adding 1 to it … 11STORE97 12LOAD98/as… 13SUB93 14STORE98 15BRP06/… 16LOAD99 17OUT/before 18HALT 9060/now this is the initial address /used to hold the address of the data 98/used to hold the current count 99/used to hold the current total Totalizer Loop with Indirect Addressing Asterisk used to indicate indirect instruction

29 Supplementary Chapter 2 Instruction Addressing Modes S2-29 Register Indirect Addressing  Also called register deferred addressing  Address pointed is stored in a general- purpose register  Advantage: efficient  1 instruction to load pointer address in register  Data accessed in the same number of fetch- execute instructions as direct addressing  Small address field required (3 or 4 bits)  Excellent for addressing large memory space with small instruction word

30 Supplementary Chapter 2 Instruction Addressing Modes S2-30 Register Indirect Addressing Dual Duty  Autoincrementing/autodecrementing  Direct implementation of C’s “++” and “- -”  Instruction  Performs normal function like LOAD or ADD  Plus increments or decrements register each time instruction executed  Advantage: simplifies writing program loops  Replaces steps 7,9,10, 11 on Slide #28

31 Supplementary Chapter 2 Instruction Addressing Modes S2-31 Register Indirect Addressing Obtaining Data

32 Supplementary Chapter 2 Instruction Addressing Modes S2-32 Motorola CPU MOVE

33 Supplementary Chapter 2 Instruction Addressing Modes S2-33 Indexed Addressing  Use address in the instruction like direct addressing  But modify address by adding value from another register  General purpose or special index register

34 Supplementary Chapter 2 Instruction Addressing Modes S2-34 Indexed vs. Base Offset  Both offset address by amount stored in another register  Base offset: primarily to expand addressing range for a given address field size  Value of base address likely to be large and rarely changed during execution  Index register: primarily a table offset for subscripting  Value in index register most like small and frequently changing  Autoindexing: similar to autoincrementing

35 Supplementary Chapter 2 Instruction Addressing Modes S2-35 Index Register: Modifying an Address

36 Supplementary Chapter 2 Instruction Addressing Modes S2-36 Using Both Base Offset and Indexed Addressing

37 Supplementary Chapter 2 Instruction Addressing Modes S2-37 Totalizer Loop with Indexed Addressing MailboxInstructionComments 00LDA91 /total is kept in A. This sets A to 0 (not indexed). 01LDX92 /initialize the counter to 19 /ADD 79, ADD 78, etc. as X is decremented 03DECX /Decrement the index–19, 18, etc. 04BRPX02 /test if done (when X decrements from 0 to -1) 05OUT /done; output the result from A 06HALT symbol indicates indexed instructionLDX: LOAD register X is the indexed register (offset and counter)LDA: LOAD accumulator

38 Supplementary Chapter 2 Instruction Addressing Modes S2-38 Copyright 2003 John Wiley & Sons All rights reserved. Reproduction or translation of this work beyond that permitted in Section 117 of the 1976 United States Copyright Act without express permission of the copyright owner is unlawful. Request for further information should be addressed to the permissions Department, John Wiley & Songs, Inc. The purchaser may make back-up copies for his/her own use only and not for distribution or resale. The Publisher assumes no responsibility for errors, omissions, or damages caused by the use of these programs or from the use of the information contained herein.


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