# TOPIC : Reduced Ordered Binary Decision Diagrams UNIT 1: Modeling Digital Circuits Module 1 : Functional Modeling.

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TOPIC : Reduced Ordered Binary Decision Diagrams UNIT 1: Modeling Digital Circuits Module 1 : Functional Modeling

Binary Decision diagram(BDD) Is there any other way to reduce the number of entries for describing the circuit? ◦ Yes, BDD. A graph model of the function of a circuit. One can determine the output by simple graph traversal procedure. There are decision nodes and terminal nodes. Each decision node will have two child nodes: 0-child, 1-child. At every node, follow the left or the right branch depending upon the value (0 or 1) of the corresponding decision node.

Example The dotted lines represent a 0-child and solid lines represent 1- child According to the given inputs traverse down to the exit terminal. Ex: x1=1,x2=0,x3=1 Since x1=1 select the solid line to x2, then x2=0 so select the dotted line to x3, and since x3=1 chose the solid line from x3 which leads to the exit terminal and reflects the output as 1.

How to construct BDD?? Start the tree with one of the inputs, say x1. X1 can be 0 or 1, so map these two possible cases to the next input, say x2. Follow the same procedure for x2 and all the other inputs. Follow till you reach the exit terminal (no more inputs to map). Point the exit terminals to 0 or 1 looking at truth table. Binary decision diagram is built. This diagram can be simplified leading to reduction in the input entries.

Reduced Ordered BDD (ROBDD) Observe the complete BDD of the example from exit terminals. Both branches from the left most node x3 results in the same value 1, we remove this node and replace it by an exit branch with value 1. Similarly the next node x3 can be replaced by 0. Reduced BDD

ROBDD contd… Observe the two left most exit terminals ◦ they are the inverted values of its parent node, so the left x2 node can be replaced by x2. Similarly the node x3 which is to the left of x2 can be replaced by x3 The two right most exit terminals can be removed, since they are the same as their parent node. The dot represents the inverter.

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