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1 Voltage Translation Clamps ASIA MARKETING DEVELOPMENT Samuel Lin Standard Logic 2012/Q1.

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Presentation on theme: "1 Voltage Translation Clamps ASIA MARKETING DEVELOPMENT Samuel Lin Standard Logic 2012/Q1."— Presentation transcript:

1 1 Voltage Translation Clamps ASIA MARKETING DEVELOPMENT Samuel Lin Standard Logic 2012/Q1

2 Advantage With Voltage Clamp High Speed Translation Direction Control Unnecessary Low Ron for less distortion With 5V Supply, it can level shift 1V to 5V range on the Input/Outputs Bi-directional I2C™ Translation. GTL to TTL/LVTTL Translation Open Drain/Push Pull Interface 2

3 TVC Structures # k  B1A1 V REF A2 B2 VCC=5V A IO : non-open drain B IO : non-open drain V Pullup

4 TVC Structures # k  B1A1 V REF A2 B2 VCC=5V V Pullup A I/O : non-open drain B I/O : open drain

5 TVC Structures # k  B1A1 V REF A2 B2 VCC=5V A I/O : open drain B I/O : non-open drain V ref V Pullup

6 TVC Structures # k  B1A1 V REF A2 B2 VCC=5V V Pullup A I/O : open drain B I/O : open drain V ref

7 7 Flexible Bi-Direction

8 Typical Design Examples Passive Bi-Directional Translator Clamps. Pin “Gate” must use 200k  Pull Up to Vcc, which must be higher than VREF minimum 1V to turn on the FET. VREF would cut-off all A-Port Output to maximum level. A-Port has 5V input tolerant,need pull up when open drain B-Port is flexible to desired Logic Voltage Level which depends on pull up Vcc.

9 9 Up-Unique Direction

10 Example of Unique Up Translator k  B1A1 1.2V A2 B2 VCC=3.3V 3.3V CMOS LOGIC 200k  B1A1 1.2V A2 B2 VCC=3.3V 3.3V OPEN DRAIN 1.2V 1.2V Clamp to 3.3V

11 11 Down-Unique Direction

12 Example of Unique Down Translator k  B1A1 1.2V A2 B2 VCC=3.3V 3.3V CMOS LOGIC 200k  B1A1 1.2V A2 B2 VCC=3.3V 3.3V OPEN DRAIN 1.2V 3.3V Clamp to 1.2V

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