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CYBERPHYSICAL SYSTEMS & EMBEDDED PROCESSORS EEN 417 Fall 2013 8/27/13, Dr. Eric Rozier, V1.0, ECE
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CYBERPHYSICAL SYSTEMS
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Model-Based Design
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Cyber Physical Systems: Computational + Physical CPS is Multidisciplinary Computer Science: Carefully abstracts the physical world System Theory: Deals directly with physical quantities
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Challenge
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What this course is about A principled and scientific approach to engineering embedded systems – Modeling, Design, Implementation, Testing, Analysis – Not just hacking!
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Traditionally, embedded systems has been an industrial (not academic) problem, about resource limitations. small memory small data word sizes relatively slow clocks When these are the key problems, emphasize efficiency: write software at a low level (in assembly code or C) avoid operating systems with a rich suite of services develop specialized computer architectures: –programmable DSPs –network processors develop specialized networks –Can, FlexRay, TTP/C, MOST, etc. This is how embedded SW has been designed for 30 years
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But embedded systems do have more fundamental differences from general-purpose computation: time matters –“as fast as possible” is not good enough concurrency is intrinsic –it’s not an illusion (as in time sharing), and –it’s not (necessarily) about exploiting parallelism processor requirements can be specialized –predictable, repeatable timing –support for common operations (e.g. FIR filters) –need for specialized data types (fixed point, bit vectors) programs need to run (essentially) forever –memory usage has to be bounded (no leaks!!) –rebooting is not acceptable
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What about “real time”? Make it faster! What if you need “absolutely positively on time”? Today, most embedded software engineers write code, build your system, and test for timing. Model-based design seeks to specify dynamic behavior (including timing) and “compile” implementations that meet the behavior.
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Prioritize and Pray! Real-Time Multitasking? All too often, real-time operating systems (RTOSs) are used in a rather ad hoc way. Without any particular principles, engineers tweak priorities until the prototype works under test. The resulting system is brittle, meaning the small changes in the operating conditions (or in the design of the system) can cause big changes in behavior. For example, replacing the processor with a faster one can cause real-time failures.
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An engineer’s responsibility Korean Air 747 in Guam, 200 deaths (1997) 30,000 deaths and 600,000 injuries from medical devices (1985-2005) –perhaps 8% due to software? source: D. Jackson, M. Thomas, L. I. Millett, and the Committee on Certifiably Dependable Software Systems, "Software for Dependable Systems: Sufficient Evidence?," National Academies Press, May 9 2007.
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A Story A “fly by wire” aircraft, expected to be made for 50 years, requires a 50-year stockpile of the hardware components that execute the software. All must be made from the same mask set on the same production line. Even a slight change or “improvement” might affect timing and require the software to be re-certified.
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Abstraction Layers The purpose for an abstraction is to hide details of the implementation below and provide a platform for design from above.
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Abstraction Layers Every abstraction layer has failed for time- sensitive applications.
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Is the problem intrinsic in the technology? Electronics technology delivers highly repeatable and precise timing… … and the overlaying software abstractions discard it. 20.000 MHz (± 100 ppm)
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EMBEDDED PROCESSORS
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Typical PC Architecture Single processor (plus GPU) Not a lot of concurrency Market is dominated by a single architecture and instruction set x86 Image courtesy of Wikimedia Commons GPL
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Example Embedded System: Apple iPhone A5 Processor Qualcomm DSP Images courtesy of iFixit © 2012, CC-BY-NC-SA
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Example Embedded System: Apple iPhone A5 Processor Qualcomm DSP … Texas Instruments touchscreen microcontroller Cirrus Logic DSP Images courtesy of iFixit © 2012, CC-BY-NC-SA
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Example Embedded System: Apple iPhone A5 Processor Qualcomm DSP … Texas Instruments touchscreen microcontroller Cirrus Logic DSP Barely begun to examine this system!
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Example Embedded System: Apple iPhone A5 Processor Qualcomm DSP … Texas Instruments touchscreen microcontroller Cirrus Logic DSP Barely begun to examine this system! Four different embedded processors!
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Example Embedded System: Apple iPhone A5 Processor Qualcomm DSP … Texas Instruments touchscreen microcontroller Cirrus Logic DSP Barely begun to examine this system! Four different embedded processors! Four different manufacturers!
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Example Embedded System: Apple iPhone A5 Processor Qualcomm DSP … Texas Instruments touchscreen microcontroller Cirrus Logic DSP Barely begun to examine this system! Four different embedded processors! Four different manufacturers! Four different architectures!
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Example Embedded System: Apple iPhone A5 Processor Qualcomm DSP … Texas Instruments touchscreen microcontroller Cirrus Logic DSP Lots of concurrency!
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Example Embedded System: Apple iPhone A5 Processor Qualcomm DSP … Texas Instruments touchscreen microcontroller Cirrus Logic DSP Lots of concurrency! Different instruction sets!
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Example Embedded System: Apple iPhone A5 Processor Qualcomm DSP … Texas Instruments touchscreen microcontroller Cirrus Logic DSP Highly Specialized!
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What advantages might there be to specialization?
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Energy consumption, specialized hardware, efficiency, etc
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ATMEGA328, AVR PROCESSORS, & ARDUINO
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Dueling Architectures
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Advantages/Disadvantages to each?
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Complexity, dedicated buses Von Neumann bottleneck Advantages/Disadvantages to each?
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ATmega328
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CPU (Details later)
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ATmega328 Flash – program memory 32K SRAM – data memory 2K EEPROM 1K Nonvolatile memory
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What kind of architecture?
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AVR CPU
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Instruction fetch and decode
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AVR CPU ALU instructions
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AVR CPU I/O and special functions
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AVR CPU 32 8-bit general purpose registers Part of SRAM memory space
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AVR CPU X, Y, and Z registers 16-bit registers made using registers 26-31 Support indirect addressing
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AVR Memory FLASH BOOT SECTION 32 registers 64 I/O registers 160 Ext I/O Registers Internal SRAM EEPROM
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AVR Architecture Three timers Flexible Choose clock rate Choose “roll-over” Generate interrupts Generate PWM signals
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AVR Architecture Interface to pins Each pin directly programmable Program direction (I/O) Program value Program pull-ups Some special pins Analog/Digital Clocks Reset
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AVR Architecture 3 8-bit ports (B, C, D) Each port controlled by 3 8-bit registers Each bit controls one I/O pin DDRx – direction register Defines Input(0) or Output(1) PINx – Pin input value Reading this “register” returns value of the pin PORTx – Pin output value Writing to this register sets value of pin
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Pin Circuitry
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Pin Input PINx DDRx =0 PORTx
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Synchronization and Timing Takes a clock cycle for data output to be reflected on the input
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Why is this necessary?
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What if the pin changes value near the falling edge of a clock cycle?
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Why is this necessary? What if the pin changes value near the falling edge of a clock cycle? Metastability
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Pin Output PINx DDRx =1 PORTx
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Pin Input – PORT controls pullup PINx DDRx =0 PORTx
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Pullups – If a pin is an input (DDRxi = 0) PORTxi = 0 – Pin is floating PORTxi = 1 – connects pullup to the pin – Keeps pin from floating if noone is driving – Llows wired-OR bus – Individual bits can be set cleared using bit-ops – A bit can be toggled by writing I to PINxi
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Arduino Uno ATmega328
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Arduino Uno ATmega328ATmega16U2
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Arduino Digital and Analog I/O Pins Digital pins – Pins 0-7: PORT D – Pins 8-13: PORT B – Pins 14-19: PORT C Named A0 – A5 Arduino analog – Pins 0 and 1 are RX and TX for serial comms – Pin 13 connected to base board LED
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More Info Too much to cover! See data sheets for Arduino and ATmega328 – http://www.atmel.com/Imag es/8271s.pdf http://www.atmel.com/Imag es/8271s.pdf – http://www.atmel.com/imag es/doc0856.pdf http://www.atmel.com/imag es/doc0856.pdf – http://arduino.cc/en/Main/Ar duinoBoardUno http://arduino.cc/en/Main/Ar duinoBoardUno
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PARALLELISM
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Parallelism vs. Concurrency What’s the difference?
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Parallelism vs. Concurrency Concurrency is central to embedded systems! – Concurrency – different parts of the program conceptually execute simultaneously – Parallel – different parts physically execute simultaneously
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Pipelining
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Sample five stage pipeline What’s going on here?
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Reservation Table
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Pipeline hazards represented by dashed lines Pipeline Hazards!
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Pipeline Interlock to prevent hazard
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Other types of parallelism CISC vs. RISC Superscalar processors Hyperthreading Multicore
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WRAP UP
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Industrial Connection Mr. Tony Kaap – Motion Picture Industry: Motion Capture Mr. Robert Zeh – Financial Industry: Real-time systems Stanford University – Tagging of Pelagic Predators MBARI – Deep sea embedded systems and data collection Dr. Kristin Rozier – NASA: Safety Critical Systems
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For next time Read Chapter 2 (Continuous Dynamics) Assignment 1: Problems 1, 2, and 3 of Chapter 7.
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