Presentation is loading. Please wait.

Presentation is loading. Please wait.

UIUC CS 497: Section EA Lecture #2 Reasoning in Artificial Intelligence Professor: Eyal Amir Spring Semester 2004.

Similar presentations


Presentation on theme: "UIUC CS 497: Section EA Lecture #2 Reasoning in Artificial Intelligence Professor: Eyal Amir Spring Semester 2004."— Presentation transcript:

1 UIUC CS 497: Section EA Lecture #2 Reasoning in Artificial Intelligence Professor: Eyal Amir Spring Semester 2004

2 Last Time Propositional logic as a language for representing knowledge Did not touch on reasoning procedures Defined language, signature, models From homeworks: you should know –Soundness; Completeness theorem –Deduction theorem –De Morgan Laws

3 Today Reasoning procedures for propositional logic –Checking Satisfiability (SAT) using DPLL –Proving entailment using Resolution Application du jour: Formal Verification Applications we will not touch –AI planning, graph algorithms, cryptography, …

4 SAT via Generate and Test If we have a truth table of KB, then we can check that KB satisfiable by looking at it. Problem: n propositional symbols  2 n rows in truth table –Checking interpretation I takes time O(|KB|) –Generating table is expensive: O(2 n |KB|) time Observation: SAT requires us to look only for one model

5 Clausal Form Every formula can be reformulated into an equivalent CNF formula (conjunction of clauses). Examples (using De Morgan Laws): )(bb  )(ab  )(ba  )(aa 

6 Clausal Form Every formula can be reformulated into an equivalent CNF formula (conjunction of clauses). Examples:

7 Clausal Form Every formula can be reformulated into an equivalent CNF formula (conjunction of clauses). Examples:

8 Propagating a Truth-Value KB in CNF, and we observe p=TRUE Then, removing clauses with p positive from KB gives an equivalent theory. Example: KB Observe

9 Propagating a Truth-Value KB in CNF, and we observe p=TRUE Then, removing negative instances of p from KB gives an equivalent theory. Example: KB Observe

10 DPLL Search Procedure for CNF 1.If no clauses in KB, return T 2.If a clause in KB is empty (FALSE), return F 3.If KB has a unit clause C with prop. p, then return DPLL(KB,p←polarity(p,C)) 4.Choose an uninstantiated variable p 5.If DPLL(KB, p←TRUE) returns T, return T 6.If DPLL(KB, p←FALSE) returns T, return T 7.Return F

11 DPLL in Action On board

12 DPLL in Action On board Note: we could know without thorough checking that this KB is satisfiable

13 DPLL in Action On board

14 Related: SAT Solving Order of selection of variables (lecture #5) Stochastic local search (paper #1) Binary Decision Diagrams (paper #2) Strategies other than unit (paper #23) 2-SAT is solvable in linear time Smart backtracking (paper #21) Clauses/Vars in Random SAT (paper #22) SAT via probabilistic models (paper #15)

15 Take a Breath Until now: SAT solving –Search in the space of models From now: Resolution theorem proving –Search in the space of proofs Later: Formal Verification

16 Resolution Theorem Proving Given: –KB – a set of propositional sentences –Query Q – a logical sentence Calling procedure: 1.Add  Q to KB 2.Convert KB into clausal form 3.Run theorem prover. If we prove contradiction, return T. Otherwise, return F.

17 Resolution Theorem Proving 1.Add  Q to KB 2.Convert KB into clausal form 3.Run theorem prover. If we prove contradiction, return T. Otherwise, return F. Deduction theorem: KB Q iff KB   Q FALSE ╨╨

18 Resolution Theorem Proving 1.Add  Q to KB 2.Convert KB into clausal form 3.Run theorem prover. If we prove contradiction, return T. Otherwise, return F. Deduction theorem: KB Q iff KB   Q FALSE ╨╨

19 Propositional Resolution Resolution inference rule: C1: p1  C1’ C2:  p1  C2’ C3: C1’  C2’ C1   p1  C1’ C2  p1  C2’

20 Propositional Resolution Resolution algorithm (saturation): 1.While there are unresolved C1,C2: (1)Select C1, C2 in KB (2)If C1, C2 are resolvable, resolve them into a new clause C3 (3)Add C3 to KB (4)If C3={ } (empty clause), we got a contradiction. 2.STOP C1: p1  C1’ C2:  p1  C2’ C3: C1’  C2’

21 Resolution in Action On board Negated Query KB C1: p1  C1’ C2:  p1  C2’ C3: C1’  C2’

22 Resolution in Action On board C1: p1  C1’ C2:  p1  C2’ C3: C1’  C2’ Negated Query KB

23 Properties of Resolution Running time for n variables, m clauses: –Resolving two clauses: O(n) –Finding two resolvable clauses: O(1) –Overall algorithm: O(3 n n)

24 Properties of Resolution Theorem: Resolution is sound –Resolving clauses in KB generates valid consequences of KB Theorem: Resolution is refutation complete –Resolution of KB with  Q yields the empty clause iff KB Q ╨

25 Properties of Resolution Resolution does not always generate Q KB = { {a,b}, {  a,b}, {b,c} } Q = b   c = {b,  c} Theorem: Resolution always generates a clause that subsumes Q iff KB Q Example: Resolving KB generates b ╨

26 Simple Enhancements Remove subsumed clauses –{ p } subsumes { p, q } –{ p, q } subsumes { p, q, r } –{  p } does not subsume { p, q } Contract same literals –{ p, p, q } becomes { p, q } Unit resolution: resolve unit clauses first

27 Related to Prop. Resolution Clause selection for resolution (lecture #5, paper #19) Consequence finding (paper #3) Prime implicates/implicants (paper #4)

28 Resolution vs SAT SAT solvers can find models Resolution sometimes better at finding contradictions With resolution it is easier to explain and provide a proof

29 Summary So Far Finding models using DPLL Resolution theorem proving allows us to find contradictions and explanation. –The deduction theorem tells us how to ask queries from either SAT solvers or Resolution

30 Application: Hardware Verification AND not AND f1f1 f2f2 f3f3 f4f4 f5f5 OR x1x1 x2x2 x3x3 f 5 (x 1,x 2,x 3 ) = a function of the input signal Question: Can we set this boolean cirtuit to TRUE?

31 Application: Hardware Verification AND not AND f1f1 f2f2 f3f3 f4f4 f5f5 OR x1x1 x2x2 x3x3 f 5 (x 1,x 2,x 3 ) = f 3  f 4 =  f 1  (f 2  x 3 ) =  (x 1  x 2 )  (  x 2  x 3 ) Question: Can we set this boolean cirtuit to TRUE? SAT(f 5 ) ? M[x 1 ]=FALSE M[x 2 ]=FALSE M[x 3 ]=FALSE

32 Hardware Verification Questions in logical circuit verification –Equivalence of circuits –Arrival of the circuit to a state (required a temporal model, which gets propositionalized) –Achieving an output from the circuit

33 Summary SAT checking using DPLL (instantiate, propagate, backtrack) Entailment/SAT checking using Resolution (create more and more clauses until KB is saturated) Formal verification uses mainly SAT checking such as DPLL, but also sometimes resolution

34 Next Time FOL Resolution Homework: 1.Read readings (incl. application reading) 2.Make sure you know: –Deduction theorem for FOL –Language of FOL –Soundness, completeness, and incompleteness theorems –Models of first-order logic


Download ppt "UIUC CS 497: Section EA Lecture #2 Reasoning in Artificial Intelligence Professor: Eyal Amir Spring Semester 2004."

Similar presentations


Ads by Google