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Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Digital Signal Processor The Heart of Modern Real-Time Control Systems.

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Presentation on theme: "Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Digital Signal Processor The Heart of Modern Real-Time Control Systems."— Presentation transcript:

1 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Digital Signal Processor The Heart of Modern Real-Time Control Systems

2 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Chapter 3 Examples In Using The F243 DSK

3 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Learning Objectives Writing The First Program. Example 1 : Flashing The XF Led. Example 2 : Flashing The XF Led More Brighter. Example 3 : Flashing The XF Led Equally. Example 4 : Generating A Time Delay Example 5 : Generating A Longer Time Delay. Example 6 : Saving The ACCUMULATOR At The Data Memory. Example 7 : Reading A Value From A Mixed I/O Port. Example 8 : Filling A Block Of Memory With A Particular Value. Example 9 : Generating 100 kHz Signal Using Timers. Example 10 : Controlling The Duty Cycle Of Timers Output By A/DC Result.

4 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Writing The First Program First draw the corresponding flow chart of the desired program. Choose a suitable text editor to write your program (a suitable text editor is supplied as standard with Microsoft Windows, namely Notepad). Write your program using any supported programming language as Assembly, C, or C++, depending on the compiler you use. Save the program in the project folder. Compile it to generate the DSK file which is comprehensible to the DSP. Now, your program is ready to run.

5 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Example 1 : Flashing The XF Led It is a simple example which defines the main principles of writing a program using the assembly language. On the TMS320F243 DSK there are two light emitting diodes (LEDs). One is for the power-supply and is always on. The second is available to the user and can be controlled by software. This is the XF LED. The XF LED on the DSK is driven from a physical pin on the TMS320F243 device.

6 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Program Source Code.setsect “.text”, 8800h start: SETC XF ; Turn on XF LED. CLRC XF ; Turn off XF LED. B start ; Go round again.

7 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. What Happens After Running This program? The first line tells the assembler to reserve a segment in the program memory for our program. Its name is “text” and begins from the address 8800h (hexadecimal form). The second line begins with the label start, any word in the first column is taken to be a label. SETC XF means that the XF led (pin) will set high. The third line CLRC XF means that the XF led (pin) will set low. The last line tells the assembler to branch to the label start. The colored words are comments. Everything follows a semicolon is treated as a comment.

8 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. The Program In Cycles.setsect “.text”, 8800h start: SETC XF ; Turn on XF LED. 1 cycle. CLRC XF ; Turn off XF LED. 1 cycle. B start ; Go round again. 4 cycles. One cycle equals 400 ns. The XF led will be ON for one cycle and OFF for five cycles. The result is that the XF led will appear DIM. The signal period= 1 x x 400 = 2400 ns The signal frequency is approximately kHz.

9 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. The Output Taken From The XF Pin

10 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Example 2 : Flashing The XF Led Brighter As the pervious example we will make a loop to control the XF led, but this time we will reverse the order in which the SETC XF and CLRC XF instructions occur..setsect “.text”, 8800h start: CLRC XF ; Turn OFF XF LED. 1 cycle SETC XF ; Turn ON XF LED. 1 cycle. B start ; Go round again. 4 cycles The led will be OFF for one cycle, and ON for five cycles. The result is that the led appears Brighter. The signal period still 2400 ns. The frequency is kHz.

11 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. The Output Taken From The XF Pin

12 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Example 3 :Turning The XF Led ON and OFF Equally We need to equal the number of cycles for each operation. The NOP instruction will do so..setsect “.text”, 8800h start: CLRC XF ; Turn off XF LED. 1 cycle NOP ; No operation. 1 cycle. SETC X ; Turn on XF LED. 1 cycle B start ; Go round again. 4 cycles

13 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. The Output Taken From The XF pin

14 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Example 4 : Generating a Time Delay The Accumulator is a 32 bit long R/W register which is used as a storage for the arithmetic results. LACC is the instruction used for storing an immediate value in the accumulator. SUB means subtract a value from the accumulator contents. BCND is a conditional looping instruction.

15 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Program Source Code setsect “.text”, 8800h start: SETC SXM ; Turn on sign-extension mode. SETC XF ; Turn on XF LED. LACC #7FFFh ; Load initial value of 7FFFh into the ; accumulator. The accumulator ; now contains 00007FFFh. loop1: SUB #1 ; Decrement the accumulator. BCND loop1, NEQ ; Test the accumulator. If the accumulator ; does not contain zero (the condition NEQ ; evaluates to TRUE) then branch to the ; label loop1. CLRC XF ; Turn off XF LED. LACC #7FFFh ; Load initial value of 7FFFh into the ; accumulator. The accumulator ; now contains 00007FFFh. loop2: SUB #1 ; Decrement the accumulator. BCND loop2, NEQ ;Test the accumulator. If the accumulator ; does not contain zero (the condition NEQ ; evaluates; to TRUE) then branch to the ; label loop2. B start ; Go round again from beginning.

16 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Calculating The Delay Time.setsect “.text”, 8800h LACC #7FFFh ; 2 cycles. loop: SUB #1 ; 1 cycle. BCND loop, NEQ ; 4 cycles when TRUE. ; 2 cycles when FALSE. The execution time will be ( x ) x 0.4µs = µs = seconds. } The delay loop

17 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. The Generated Waveform

18 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Example 5: Generating Longer Time Delay Just, turn off the Sign Extension mode, and load the accumulator with a value more than 7FFFh ( less than FFFFFFFFh ). Now your delay loop more longer than the previous example. The execution time will be [ 2 + (ACC-1) x ] x 0.4µs

19 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Program Source Code. setsect “.text”, 8800h start: CLRC SXM ; Turn off sign-extension mode. SETC XF ; Turn on XF LED. LACC #0FFFFh ; Load initial value of FFFFh into the ; accumulator. The accumulator ; now contains 0000FFFFh. loop1: SUB #1 ; Decrement the accumulator. BCND loop1, NEQ ; Test the accumulator. If the accumulator ; does not contain zero (the condition NEQ ; evaluates to TRUE) then branch to the ; label loop1. CLRC XF ; Turn off XF LED. LACC #0FFFFh ; Load initial value of FFFFh into the ; accumulator. The accumulator ; now contains 0000FFFFh. loop2: SUB #1 ; Decrement the accumulator. BCND loop2, NEQ ;Test the accumulator. If the accumulator ; does not contain zero (the condition NEQ ; evaluates; to TRUE) then branch to the ; label loop2. B start ; Go round again from beginning.

20 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. The Generated Waveform

21 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Example 6: Saving The ACCUMULATOR at The Data Memory DSP memory is divided into Pages, every Page contains 128 addresses and every address contains a 16 bit long word. In other words the DSP memory locations are 16 bits Mapped Registers.

22 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Program Source Code.setsect “.text”, 8800h start: LDP #6h ; Data page 6. Gain access to data memory ; addresses 300h to 37Fh. SETC SXM ; Turn on sign-extension mode. LACC #0FEDCh ; Load accumulator with the known test value ; FFFFFEDCh. SACH 0h ; Store the high word of the accumulator at ; data memory address 300h + 0h = 300h. ; This data memory address now contains ; FFFFh. SACL 1h ; Store low word of accumulator at data ; memory address 300h + 1h = 301h. This ; data memory address now contains FEDCh. B start ; Go round again.

23 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Program Results

24 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Example 7: Reading a Value From a Mixed I/O Port The F243 DSK has a programmable Control Registers which control the data direction. Using these Registers we can have a mixed I/O ports to communicate with the DSP outside world.

25 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Program Source Code.setsect “.text”, 8800h start: LDP #225 ; Data page 225. Gain access to data ; memory addresses 7080h to 70FFh. SPLK #0F0F0h, 1Ch ; Test purposes. Write at known value to ; PCDATDIR at data memory address ; 7080h + 1Ch = 709Ch. loop: LACC 1Ch ; Load contents of PCDATDIR at data memory ; address 7080h + 1Ch= 709Ch into the ; accumulator. AND #000Fh ; Clear all bits except bit 3 to bit 0. The ; accumulator now contains the input data only LDP #6 ; Data page 6. Gain access to data memory ; addresses 300h to 37Fh. SACL 20h ; Save at 300h + 20h = 320h for later use. LDP #225 ; Data page 255. Page used by PCDATDIR. B loop ; Go round again.

26 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Program Results Shown From The Data Memory Registers

27 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Program Results Shown From The Data Memory Registers

28 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Program Results Shown From The Data Memory Registers

29 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Program Results Shown From The Data Memory Registers

30 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Program Results Shown From The Data Memory Registers

31 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Example 8: Filling a Block of Data Memory With a Particular Value. Another method to access the DSP memory locations, is to use the Indirect Addressing mode. This method make the moving between addresses in data memory more easy than the Direct Method. Just fill your Auxiliary Registers and go on.

32 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Program Source Code.setsect ".text", 8800h start: MAR *, AR4 ; ARP = 4. Use AR4 for indirect ; addressing. LAR AR4, #3FFh ; AR4 points to address 300h. LACC #100h ; Number of counts = 256. loop: SPLK #55AAh, *- ; Store the immediate value 0 ; decimal at the data memory ; address pointed to by AR4. ; Increment AR4 to point to next ; data memory address. SUB #1 ; Decrement counter. BCND loop, NEQ ; Test if counter has reached ; zero. If not, go round loop again. B start ; Return to beginning.

33 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Data Memory Targets Have Been Filled

34 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Example 9: Generating 100 kHz Signal Using Timers The peripheral set for the ’F243 device includes: Event Manager: Timers and PWM generators for Digital Motor Control The Event Manager module provides a broad range of functions and features that are particularly useful in Motion Control and Motor Control applications.

35 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Program Source Code start: LDP #DP_DGCR ; Data Page for OCRA. SPLK #1000h, OCRA ; T1PWM output on pin ; IOPC4. LDP #DP_EV ; Data page for timers. SPLK #8142h, T1CON ; Internal clock, GP T1 off. SPLK #42h, GPTCON ; Active high output on ; IOPC4. SPLK #63h, T1PR ; generates 100kHz. SPLK #32h, T1CMP ; 50% duty cycle. SPLK #0FFFEh,T1CNT ; Timer count value before ; counter starts (-2). SPLK #9142h, T1CON ; GP T1 on. loop: B loop ; Loop forever.

36 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Output Waveform Taken From IOPC4 Pin

37 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Example 10: Controlling The Duty Cycle Of Timers Output By A/DC Result. The peripheral set for the ’F243 devices includes: A/D : 10-bit ±1, 1-µs conversion, 8 channel, Analog-To-Digital converter. Using an analogue input, we can control many functions carried out by the GP Timers.

38 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Program Source Code.setsect ".text", 8800h DP_EV.set 232 ; Data page for Event ; Manager DP_DGCR.set 225 ; Data page for digital ; control registers OCRA. set 10h ; Output Control register GPTCON.set 0h ; General-Purpose Timer ; Control Register T1CNT.set 1h ; GP Timer 1 Count Register T1CMP.set 2h ; GP Timer 1 Compare ; Register T1PR.set 3h ; GP Timer 1 Period Register T1CON.set 4h ; GP Timer 1 Control ; Register

39 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Program Source Code.setsect ".text", 8800h DP_DIGCR. set 225 ; Data Page for Digital ; control OCRA.set 10h ; Output control register DP_ADC.set 224 ; Data Page for ADC ADCTRL1.set 32h ; ADC Control Register 1 ADCTRL2.set 34h ; ADC Control Register 2 ADCFIFO1.set 36h ; ADC measured value DP_EV.set 232 ; Data Page for Event ; Manager GPTCON.set 0h ; GP Timer Control Register T1PR.set 3h ; Timer 1 period register T1CMP.set 2h ; Timer 1 compare register T1CNT.set 1h ; Timer 1 count T1CON.set 4h ; Timer 1 control register

40 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Program Source Code start: LDP #DP_DIGCR ; Data Page for Digital control SPLK #1000h, OCRA ; Configure T1PWM on IOPC4. LDP #DP_ADC ; Data Page for ADC. SPLK #0C03h, ADCTRL1 ; Channel 0. Continuous ;conversion.Start conversion SPLK #0005h, ADCTRL2 ; Conversion time. LDP #DP_EV ; Data Page for timers. SPLK #8142h, T1CON ; GP T1 off. SPLK #41h, GPTCON ; PWM active low. SPLK #03FEh, T1PR ; Output period = SPLK #0h, T1CMP ; Start with output off. SPLK #0FFFEh, T1CNT ; Set count to negative. SPLK #9142h, T1CON ; Enable GP Timer 1. CLRC SXM ; Ensure ADCFIFO1 is taken ; as a positive value.

41 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Program Source Code loop: LDP #DP_ADC ; Page 224 ADC LACC ADCFIFO1, 10 ; Load accumulator with ; result of ADC conversion ; but shifted 10 places to ; the left. LDP #DP_EV ; Change to timer page. SACH T1CMP ; Store new value as duty cycle. B loop ; Go round again.

42 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Output Waveform Taken From IOPC4 Pin

43 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Output Waveform Taken From IOPC4 Pin

44 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Output Waveform Taken From IOPC4 Pin

45 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Output Waveform Taken From IOPC4 Pin

46 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. Output Waveform Taken From IOPC4 Pin

47 Mohammed Yousef Abd El ghany, Faculty of Eng., Comm. Dep., 3rd year. End of Chapter 3


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