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IGBTs - 1 Copyright © by John Wiley & Sons 2003 Insulated Gate Bipolar Transistors (IGBTs) Lecture Notes Outline Construction and I-V characteristics Physical operation Switching characteristics Limitations and safe operating area PSPICE simulation models
IGBTs - 2 Copyright © by John Wiley & Sons 2003 Multi-cell Structure of IGBT IGBT = insulated gate bipolar transistor.
IGBTs - 3 Copyright © by John Wiley & Sons 2003 Cross-section of IGBT Cell Cell structure similar to power MOSFET (VDMOS) cell. P-region at collector end unique feature of IGBT compared to MOSFET. Punch-through (PT) IGBT - N + buffer layer present. Non-punch-through (NPT) IGBT - N + buffer layer absent.
IGBTs - 4 Copyright © by John Wiley & Sons 2003 Cross-section of Trench-Gate IGBT Unit Cell Non-punch-thru IGBT Punch-thru IGBT
IGBTs - 5 Copyright © by John Wiley & Sons 2003 IGBT I-V Characteristics and Circuit Symbols Transfer curve Output characteristics N-channel IGBT circuit symbols
IGBTs - 6 Copyright © by John Wiley & Sons 2003 Blocking (Off) State Operation of IGBT
IGBTs - 7 Copyright © by John Wiley & Sons 2003 IGBT On-state Operation
IGBTs - 8 Copyright © by John Wiley & Sons 2003 Approximate equivalent circuit for IGBT valid for normal operating conditions. IGBT equivalent circuit showing transistors comprising the parasitic thyristor. Approximate Equivalent Circuits for IGBTs
IGBTs - 9 Copyright © by John Wiley & Sons 2003 Lateral voltage drops, if too large, will forward bias junction J3. Parasitic npn BJT will be turned on, thus completing turn-on of parasitic thyristor. Large power dissipation in latchup will destroy IGBT unless terminated quickly. External circuit must terminate latchup - no gate control in latchup. Static Latchup of IGBTs
IGBTs - 10 Copyright © by John Wiley & Sons 2003 Dynamic Latchup Mechanism in IGBTs MOSFET section turns off rapidly and depletion layer of junction J2 expands rapidly into N - layer, the base region of the pnp BJT. Expansion of depletion layer reduces base width of pnp BJT and its a increases. More injected holes survive traversal of drift region and become “collected” at junction J2. Increased pnp BJT collector current increases lateral voltage drop in p-base of npn BJT and latchup soon occurs. Manufacturers usually specify maximum allowable drain current on basis of dynamic latchup.
IGBTs - 11 Copyright © by John Wiley & Sons 2003 Internal Capacitances Vs Spec Sheet Capacitances
IGBTs - 12 Copyright © by John Wiley & Sons 2003 IGBT Turn-on Waveforms
IGBTs - 13 Copyright © by John Wiley & Sons 2003 IGBT Turn-off Waveforms
IGBTs - 14 Copyright © by John Wiley & Sons 2003 IGBT Safe Operating Area Maximum collector-emitter voltages set by breakdown voltage of pnp transistor v devices available. Maximum collector current set by latchup considerations A devices can conduct 1000 A for 10 µsec and still turn-off via gate control. Maximum junction temp. = 150 C. Manufacturer specifies a maximum rate of increase of re-applied collector-emitter voltage in order to avoid latchup.
IGBTs - 15 Copyright © by John Wiley & Sons 2003 Development of PSpice IGBT Model Reference - "An Experimentally Verified IGBT Model Implemented in the SABER Circuit Simulator", Allen R. Hefner, Jr. and Daniel M. Diebolt, IEEE Trans. on Power Electronics, Vol. 9, No. 5, pp , (Sept., 1994) Nonlinear capacitors Cdsj and Ccer due to N - P junction depletion layer. Nonlinear capacitor Cebj + Cebd due to P + N + junction MOSFET and PNP BJT are intrinsic (no parasitics) devices Nonlinear resistor Rb due to conductivity modulation of N - drain drift region of MOSFET portion. Nonlinear capacitor Cgdj due to depletion region of drain-body junction (N - P junction). Circuit model assumes that latchup does not occur and parasitic thyristor does not turn.
IGBTs - 16 Copyright © by John Wiley & Sons 2003 Parameter Estimation for PSpice IGBT Model Built-in IGBT model requires nine parameter values. Parameters described in Help files of Parts utility program. Parts utility program guides users through parameter estimation process. IGBT specification sheets provided by manufacturer provide sufficient informaiton for general purpose simulations. Detailed accurate simulations, for example device dissipation studies, may require the user to carefully characterize the selected IGBTs. Built-in model does not model ultrafast IGBTs with buffer layers (punch-through IGBTs) or reverse free-wheeling diodes
IGBTs - 17 Copyright © by John Wiley & Sons 2003 PSpice IGBT - Simulation Vs Experiment
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