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Slide 3-1 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 3 Operating System Organization.

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Presentation on theme: "Slide 3-1 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 3 Operating System Organization."— Presentation transcript:

1 Slide 3-1 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 3 Operating System Organization

2 Slide 3-2 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 Purpose of an OS The Abstractions Create the Abstractions Coordinate Use of the Abstractions Processes

3 Slide 3-3 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 Device Management Device-Independent Part Device-Independent Part Device-Dependent Part Device-Dependent Part Device … Device-Dependent Part Device-Dependent Part Device-Dependent Part Device-Dependent Part

4 Slide 3-4 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 Process, Thread, and Resource Management … Processor Primary Memory Abstract Resources Multiprogramming Thread Abstraction Thread Abstraction Process Abstraction Process Abstraction Generic Resource Manager Generic Resource Manager Other

5 Slide 3-5 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 Memory Management Primary Memory Process Manager Process Manager Block Allocation Block Allocation Virtual Memory Virtual Memory Isolation & Sharing Isolation & Sharing Storage Devices

6 Slide 3-6 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 Exclusive Access to a Resource Process A Supervisor Program Supervisor Program A’s Protected Object A’s Protected Object Processor Process B

7 Slide 3-7 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 Kernels The part of the OS critical to correct operation (trusted software) Executes in supervisor mode The trap instruction is used to switch from user to supervisor mode, entering the OS

8 Slide 3-8 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 Supervisor and User Memory User Space User Space Supervisor Space Supervisor Space User Process User Process Supervisor Process Supervisor Process

9 Slide 3-9 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 Procedure Call and Message Passing Operating Systems call(…); trap return; send(…, A, …); receive(…, B, …); receive(…A, …); … send(…, B, …); send/receive

10 Slide 3-10 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 System Call Using the trap Instruction … fork(); … fork() { … trapN_SYS_FORK() … } sys_fork() sys_fork() { /* system function */ … return; } Kernel Trap Table

11 Slide 3-11 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 A Thread Performing a System Call User SpaceKernel Space fork(); sys_fork() { } Thread

12 Slide 3-12 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 Basic Operating System Organization Processor(s)Main MemoryDevices Process, Thread & Resource Manager Memory Manager Device Manager File Manager

13 Slide 3-13 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 Libraries Commands Device Driver The UNIX Architecture Interactive User Application Programs Application Programs OS System Call Interface Device Driver Driver Interface … Monolithic Kernel Module Process Management Memory Management File Management Device Mgmt Infrastructure Trap Table …

14 Slide 3-14 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 Windows NT Organization Processor(s)Main MemoryDevices Libraries Process Subsystem User Supervisor Subsystem Hardware Abstraction Layer NT Kernel NT Executive I/O Subsystem T T T T T T TT T Process Management Memory Management File Management Device Mgmt Infrastructure

15 Slide 3-15 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 4 Computer Organization

16 Slide 3-16 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 Stored Program Computers and Electronic Devices Patter n Fixed Electronic Device Variable Program Stored Program Device Jacquard Loom

17 Slide 3-17 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 The von Neumann Architecture Control Unit (CU) Central Processing Unit (CPU) Device Address Bus Data Bus Arithmetical Logical Unit (ALU) Primary Memory Unit (Executable Memory)

18 Slide 3-18 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 The ALU R1 R2 Rn... Status Registers Functional Unit Left Operand Right Operand Result To/from Primary Memory load R3,b load R4,c add R3,R4 store R3,a

19 Slide 3-19 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 Control Unit Primary Memory Fetch Unit Decode Unit Execute Unit PC IR Control Unit load R3,b load R4,c add R3,R4 store R3,a … … … …1 load R4, c 3050

20 Slide 3-20 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 Control Unit Operation PC = ; IR = memory[PC]; haltFlag = CLEAR; while(haltFlag not SET) { execute(IR); PC = PC + sizeof(INSTRUCT); IR = memory[PC]; // fetch phase }; Fetch phase: Instruction retrieved from memory Execute phase: ALU op, memory data reference, I/O, etc.

21 Slide 3-21 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 Primary Memory Unit MAR MDR Command n Read Op: Load MAR with address read 2. Load Command with “read” Data will then appear in the MDR Address Register Data Register

22 Slide 3-22 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 The Device-Controller-Software Relationship Application Program Device Controller Device Software in the CPU Abstract I/O Machine Device manager Program to manage device controller Supervisor mode software

23 Slide 3-23 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 Device Controller Interface Command Status Data 0 Data 1 Data n-1 Logic busydoneError code... busy done 0 0 idle 0 1 finished 1 0 working 1 1 (undefined)

24 Slide 3-24 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 CPU-I/O Overlap CPU Device … Ready Processes CPU Device … Ready Processes I/O Operation CPU Device … Ready Processes Uses CPU

25 Slide 3-25 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 Determining When I/O is Complete CPU Device Interrupt Pending CPU incorporates an “interrupt pending” flag When device.busy  FALSE, interrupt pending flag is set Hardware “tells” OS that the interrupt occurred Interrupt handler part of the OS makes process ready to run

26 Slide 3-26 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 Control Unit with Interrupt (Hardware) PC = ; IR = memory[PC]; haltFlag = CLEAR; while(haltFlag not SET) { execute(IR); PC = PC + sizeof(INSTRUCT); IR = memory[PC]; if(InterruptRequest) { memory[0] = PC; PC = memory[1] }; memory[1] contains the address of the interrupt handler

27 Slide 3-27 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 Interrupt Handler (Software) interruptHandler() { saveProcessorState(); for(i=0; i

28 Slide 3-28 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 A Race Condition saveProcessorState() { for(i=0; i

29 Slide 3-29 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 Revisiting the trap Instruction (Hardware) executeTrap(argument) { setMode(supervisor); switch(argument) { case 1: PC = memory[1001]; // Trap handler 1 case 2: PC = memory[1002]; // Trap handler 2... case n: PC = memory[1000+n];// Trap handler n }; The trap instruction dispatches a trap handler routine atomically Trap handler performs desired processing “A trap is a software interrupt”

30 Slide 3-30 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 Direct Memory Access Primary Memory CPU Controller Device Primary Memory CPU Controller Device

31 Slide 3-31 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 Addressing Devices Primary Memory Device 0 Device 1 Device n-1 Primary Memory Device 0 Device 1 Device n-1 Device Addresses Memory Addresses

32 Slide 3-32 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 Polling I/O … // Start the device … While((busy == 1) || (done == 1)) wait(); // Device I/O complete … done = 0; … while((busy == 0) && (done == 1)) wait(); // Do the I/O operation busy = 1; … busydone Software Hardware

33 Slide 3-33 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 Detecting an Interrupt CPU Device InterruptRequest flag

34 Slide 3-34 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 The Trap Instruction Operation S Mode Trusted Code trap UserSupervisor Branch Table 2 31

35 Slide 3-35 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 Intel System Initialization ROM CMOS RAM Boot Device POST BIOS Boot Prog Loader OS … Hardware Process Data Flow Power Up

36 Slide 3-36 Copyright © 2004 Pearson Education, Inc. Operating Systems: A Modern Perspective, Chapter 3 Bootstrapping Bootstrap loader (“boot sector”) Primary Memory Loader OS Initialize hardware 5. Create user environment 6. … Fetch Unit Decode Unit Execute Unit 000A000 … … PC IR BIOS loader 0x x x x000A000


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