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Architecture Chapter 2 - Supplement Additional Features In Chapter 2.

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Presentation on theme: "Architecture Chapter 2 - Supplement Additional Features In Chapter 2."— Presentation transcript:

1 Architecture Chapter 2 - Supplement Additional Features In Chapter 2

2 /****************************************************************** To look at big endian and little endian. ******************************************************************/ union xx { long lval; char cval[4]; } xunion; int main( int argc, char *argv[] ) { int index; xunion.lval = 1; if ( argc > 1 ) xunion.lval = atol(argv[1] ); printf( "Address of lval: %x\n", &xunion.lval ); for (index = 0; index < 4; index++ ) printf( "Byte %d: Address = %x, Contents = %d\n", index, &(xunion.cval[index]), xunion.cval[index] ); } /* End of main */

3 This is the output when run on Intel Little-Ended-ness babbage% a.out Address of lval: c Byte 0: Address = c, Contents = 1 Byte 1: Address = d, Contents = 0 Byte 2: Address = e, Contents = 0 Byte 3: Address = f, Contents = 0 babbage% a.out 256 Address of lval: c Byte 0: Address = c, Contents = 0 Byte 1: Address = d, Contents = 1 Byte 2: Address = e, Contents = 0 Byte 3: Address = f, Contents = 0

4 This is the output when run on HP PA-RISC Big-Ended-ness -> a.out Address of lval: bc98 Byte 0: Address = bc98, Contents = 0 Byte 1: Address = bc99, Contents = 0 Byte 2: Address = bc9a, Contents = 0 Byte 3: Address = bc9b, Contents = 1 ready 09:24:06 -> a.out 256 Address of lval: bc98 Byte 0: Address = bc98, Contents = 0 Byte 1: Address = bc99, Contents = 0 Byte 2: Address = bc9a, Contents = 1 Byte 3: Address = bc9b, Contents = 0 ready 09:24:20

5 PA-RISC Assembler Output int main( int argc, char *argv[] ) A0: 6BC23FD9 stw %r2,-20(%sp) # A4 6FC30080 stwm %r3,64(%sp) A8 6BC43F89 stw %r4,-60(%sp) AC 6BC53F91 stw %r5,-56(%sp) if ( argc > 1 ) LINE 19 xunion.lval = 1; LINE B0 2B addil L%0,%dp # B ldo 0(%r1),%r B8 4A ldw -8188(%r19),%r BC B addi 1,%r0,%r C0 8F comib,>= 1,%r26,0x000000DC #19.l C4 68B30000 stw %r19,0(%r5) #18 xunion.lval xunion.lval = atol(argv[1] ); LINE C ldh 4(%r25),%r19 #20 ->char CC 473A000C ldh 6(%r25),%r26 ->char D0 E84000C8 bl 0x C,%r2 atol D4 D7530E10 dep %r19,15,16,%r D8 68BC0000 stw %r28,0(%r5) xunion.lval

6 PA-RISC Assembler Output printf( "Address of lval: %x\n", &xunion.lval ); LINE DC: E bl 0x000000E4,%r3 # E0 D4601C1E depi 0,31,2,%r E E39 ldo -228(%r3),%r E8 B47A0060 addi 48,%r3,%r EC E bl 0x ,%r2 printf F0 34B90000 copy %r5,%r25 for (index = 0; index < 4; index++ ) LINE F ldi 0,%r4 #22 MOVED FROM LINE F8 B addi 8,%r3,%r3 #23 printf( "Byte %d: Address = %x, Contents = %d\n", index, &(xunion.cval[index]), xunion.cval[index] ); LINE FC: 0CA40017 ldbx %r4(%r5),%r23 #23 xunion.cval : 08A40A18 addl %r4,%r5,%r A0000 copy %r3,%r E bl 0x ,%r2 printf C copy %r4,%r B addi 1,%r4,%r C887FCF comib,>,n 4,%r4,0x l CA40017 ldbx %r4(%r5),%r23 xunion.cval } /* End of main */

7 Intel Assembler Output main: pushl %ebp movl %esp,%ebp subl $24,%esp movl $1,xunion cmpl $1,8(%ebp) jle.L3 addl $-12,%esp movl 12(%ebp),%eax addl $4,%eax movl (%eax),%edx pushl %edx call atol addl $16,%esp movl %eax,%eax movl %eax,xunion.L3: addl $-8,%esp pushl $xunion pushl $.LC0 call printf addl $16,%esp movl $0,-4(%ebp).L4: cmpl $3,-4(%ebp) jle.L7 jmp.L5.L7: movl -4(%ebp),%eax movl $xunion,%edx movsbl (%eax,%edx),%eax pushl %eax movl $xunion,%edx movl %edx,%eax addl -4(%ebp),%eax pushl %eax movl -4(%ebp),%eax pushl %eax pushl $.LC1 call printf addl $16,%esp.L6: incl -4(%ebp) jmp.L4.L5:.L2: leave ret


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