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CSE140L Attend discussion hours Come to lab hours Check Q&A on the website Log In to the webboard Send me

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CSE140L About software ISE WebPack 7.1 and ModelSim XE III 6.0a in tutorials and examples If any question about older versions, come to my lab hour

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CSE140L What ’ s the exact function of each design in Lab2? How to design the circuits?

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CSE140L Lab2-I Shift Register What ’ s that for? :00pm :01pm8:02pm8:03pm

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CSE140L Lab2-I Shift Register :00pm :01pm8:02pm8:03pm D0 D1 D2 D3 CLK Din We want We have

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CSE140L Lab2-I Shift Register CLK D Q Din D0 D Q CLK D1 D Q CLK D2 D Q CLK D3 CLR Design Verification

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CSE140L Lab2-II Asyn Counter D0 D1 D2 D3 CLK We want We have

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CSE140L Lab2-II Asyn Counter CLK T Q ‘ 1 ’ (VCC) D0 T Q CLK CLR Design Verification D1

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CSE140L Lab2-III Syn Counter D0 D1 D2 D3 CLK We want We have Combinational Logic

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CSE140L Lab2-III Syn Counter CLK D Q D0 D Q CLK D1 D0 i = D0 ’ i-1 D1 i = D0 i-1 D1 ’ i-1 + D0 ’ i-1 D1 i-1 = D0 i-1 D1 i-1 D2 i = ? D3 i = ? D1

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CSE140L Lab2-IV Gray Counter D0 D1 D2 D3 CLK We want We have Combinational Logic

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CSE140L Lab2-IV Gray Counter T D0D1 D2D3 T0=(D0 D1 D2 D3) ’ T D0D1 D2D3 T2=D0 ’ D1 (D2 D3) ’ T1=?T3=?

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CSE140L Lab2-V Random Sequencer D0 D1 D2 D3 CLK We want We have

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CSE140L Lab2-V Random Sequencer CLK D Q ? D0 D Q CLK D1 D Q CLK D2 D Q CLK D3 PRE Hint

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