2SOP Given a Table of Combinations What is the SOP form for the following 3 input / 1 output digital device?SABf1
3Computing the SOP (2) This SOP has 4 minterms: f = S'AB' + S'AB + SA'B + SABSABfminterm name1m2m3m5m7
4Canonical SOPBoolean functions can use shorthand notation when in SOP form:f = S'AB' + S'AB + SA'B + SABf(S,A,B) = (m2,m3,m5,m7)orf(S,A,B) = m(2,3,5,7)
5Canonical SOP Example f(x1,x2,x3) = m(1,4,5,6) f = mintermx1x2x3f1234567x1'x2'x3 + x1x2'x3' + x1x2'x3 + x1x2x3'
6Product of Sums Form An alternate canonical “two-level” format “Product of sums” POSTwo levelsOR level followed by AND levelAgain, NOT doesn’t count as a levelNot a common as SOP, but can be useful in some situationsWhich ones?
7Computing the POS Identify rows with “0” on output (f = 0) Represent the input for each 0 row as a maxtermA logical “sum” of the input bits which guarantees that term will be “0” (sum of literals)ABf1
8Canonical POS Example f(x1,x2,x3) = (M0,M2,M3,M7) = M(0,2,3,7) f = maxtermx1x2x3f1234567(x1+x2+x3)(x1+x2'+x3)(x1+x2'+x3')(x1'+x2'+x3')
9Example: 3 Way Light Control L(A,B,C) = m(5,6) or L(A,B,C) = M(0,1,2,3,4,7)SOP:L =POS:ABCL1(A B' C)+(A B C')(A+B+C)(A+B+C') (A+B'+C)(A+B'+C') (A'+B+C)(A'+B'+C')
10Question: Under what conditions would POS form be better? (assuming we aren’t doing further reductions)
11Inverters in Two-Level Circuits Inverters are not always required for two-level logicThis is why we do not always count them among the cost of a circuitLater, we will see that many variables will be available to us in both normal and inverted form don't need to invert themWe show them only for completeness at this point
13Completeness of NANDAny Boolean function can be implemented using just NAND gates. Why?Need AND, OR, and NOTNOT: 1-input NAND (or 2-input NAND with inputs tied together)AND: NAND followed by NOTOR: NAND preceded by NOTsLikewise for NOR
15SOP Using NORs & POS Using NANDs NANDs are natural for SOP networksYou can extend this idea to multi-level circuits as long as the levels alternate AND/OR/AND/OR ending with ORYou can implement an SOP circuit using only NOR gatesAll gates become NORs; just add an extra “inverter” following the final NORNORs are natural for POS networksYou can extend this idea to multi-level circuits as long as the levels alternate OR/AND/OR/AND ending with ANDYou can implement a POS circuit using only NAND gatesAll gates become NANDs; just add an extra inverter following the final NAND
16SOP Using NAND Networks SOP can be implemented with just NAND gates“pushing the bubbles”Every gate just becomes a NAND!x12345
172x1 MUX Using NANDs Implement f = S'A + SB with NAND gates only This one is complicated by the inverter on S!
18POS Using NOR Networks POS can be implemented with just NOR gates Every gate just becomes a NORx12345
20Universal Logic Families Any logic function can be designed using only:AND, OR, NOTNANDNORThese are called “universal logic families”Actual components are often designed using either NAND or NOR gates onlyNAND and NOR require fewer transistors to buildJust having a single gate design is simpler than having 3!
21AND/OR Networks NAND/NAND Convert multi-level AND/OR net NAND/NAND
22And Again … But Be Careful conserve the polarity of the input/output signals
24Decoders and Multiplexors Decoder: Popular combinational logic building block, in addition to logic gatesConverts input binary number to one high output2-input decoder: four possible input binary numbersSo has four outputs, one for each possible input binary numberInternal designAND gate for each output to detect input combinationDecoder with enable eOutputs all 0 if e=0Regular behavior if e=1n-input decoder: 2n outputsi0i1d0d1d2d31i0d0d1d2d3i1i0i1d0d1d2d3e1i1’i0’i1’i0i1i0’i1i0
25Multiplexor (Mux) Mux: Another popular combinational building block Routes one of its N data inputs to its one output, based on binary value of select inputs4 input mux needs 2 select inputs to indicate which input to route through8 input mux 3 select inputsN inputs log2(N) selectsLike a railyard switch
27Muxes Commonly Together -- N-bit Mux 2×1a3i0Simplifyingnotation:db3i1s044-bit2×14Ca2i02x1dAI4b2i1s04DCis shortBI1for2×1a1i0s0db1i1c3s0s0c22×1a0i0dc1b0i1s0s0c0Ex: Two 4-bit inputs:A (a3 a2 a1 a0) and B (b3 b2 b1 b0)4-bit 2x1 mux (just four 2x1 muxes sharing a select line) can select between A or B
28N-bit Mux Example Four possible display items Temperature (T), Average miles-per-gallon (A), Instantaneous mpg (I), and Miles remaining (M) -- each is 8-bits wideChoose which to display using two inputs x and yUse 8-bit 4x1 mux