Saleem Sabbagh & Najeeb Darawshy Supervisors: Mony Orbach, Technion & Ilia Averbouch, IBM Started at: Winter 2012 Duration: Semester.

Presentation on theme: "Saleem Sabbagh & Najeeb Darawshy Supervisors: Mony Orbach, Technion & Ilia Averbouch, IBM Started at: Winter 2012 Duration: Semester."— Presentation transcript:

Saleem Sabbagh & Najeeb Darawshy Supervisors: Mony Orbach, Technion & Ilia Averbouch, IBM Started at: Winter 2012 Duration: Semester

 Boolean Satisfiability Problem  Given a Boolean propositional formula, does there exist assignment of values such that the formula becomes true?  e.g., given the formula f=(x1 ˅ x2 ˅ -x4) ˄ (x4) ˄ (x2 ˅ -x3) are there values of x1,x2,x3,x4 that produce f=‘1’

 Conjunctive Normal Form  In Boolean Logic, a formula is in CNF if it presented as a conjunction of clauses.  e.g., DIMACS CNF format: c Example CNF format file c p cnf 4 3 1 3 -4 0 4 0 2 -3 0

 Hardware based SAT Solver  Implementing DIMACS cnf instances into FPGA

Embedding SAT instances into FPGA (implementation) Measuring build and run times for benchmark examples Implementation Time as function of SAT complexity graph Enabling further development of fast hardware based SAT Solver

c Example CNF format file c p cnf 4 3 1 3 -4 0 4 0 2 -3 0 Example.cnf entity SAT is port( x1,x2,x3,x4: in std_logic; F: out std_logic ); end OR_ent; architecture SAT_arc of SAT is begin F <= (x1 or x3 or (not x4) and (x4) and (x2 or (not x3)); end SAT_arc; Example.vhdl

Eclipse for C/C++ Converting Altera Quartus Implementing Modelsim Altera Quartus Simulating, Testing, and Debugging

 LUT Logic Elements  LUT is a function generator that can implement any function of four variables.  Each clause will be implemented on one LUT therefor we 4000 clauses occupy 8000 LUTs (=LEs)  Random Generator (32 Bit output)  Seed * Constant + Constant  Each variable will receive a random bit, therefor 500 variables 64 x 16 = 1024 LUTs (=LEs)

Altera DE2 Altera Cyclone® II 2C35 FPGA deviceAltera Cyclone® II 2C35 FPGA device USB Blaster (on board) for programming and user API control; both JTAG and Active Serial (AS) programming modes are supportedUSB Blaster (on board) for programming and user API control; both JTAG and Active Serial (AS) programming modes are supported Altera Cyclone® II 33,216 LEs33,216 LEs 105 M4K RAM blocks105 M4K RAM blocks 483,840 total RAM bits483,840 total RAM bits 4 PLLs4 PLLs

Conversion Synthesis DeviceProgrammer Running SAT Solver

Similar presentations