Presentation on theme: "MindTunes Jonathan Chen, Po-Han Huang, Michael Kempf, Yen-Liang Tung, Christos Vezyrtzis FPGA mp3/wav memo recording."— Presentation transcript:
mindTunes Jonathan Chen, Po-Han Huang, Michael Kempf, Yen-Liang Tung, Christos Vezyrtzis FPGA mp3/wav memo recording
Object – Environment of System t = Music/voice signals are band-limited signals Memo storing dictates capacity instead of quality as primary concern We need: Low complexity system Widely accepted storage format and medium Therefore: Minimize sampling rate (8kHz) and bit analysis (16 bit) Choose wav/mp3 and USB Flash Drive
Hardware Setup (i-side only) Programmable A/D converter 1-bit output stream : Use S/P 8kHz sampling rate, dual channel No pre-filtering Same setting for D/A Why only input? Symmetry Output of hardware: at request of the processor / encoder Very quick sample demand, very slow sampling Solution: HARDWARE MUST SLOW DOWN THE SOFTWARE How long? As much as it takes !!
S/P & Clock Setup (FYI) Clocks are always created as fractions of the Audio Clock: MHz MHz / 2304 = 8kHz (Sampling) A/D Output must be converted to 16-bit word before the next sample MHz / 144 = 128kHz (S/P) Within 1-sample time interval we create one 16-bit word (sample)
FIFO Processor much faster than A/D Within 1 sample time : 6250 read commands but only 1 new sample !! Pause processor until there is word to read from the FIFO In the process of reading: If there is a read command pause the processor Put the word on the bus Then read it!! 3 cycle delay (w.r.t. processor clock)
FIFO(2) (FYI) Questions: How big? mp3 frame Synchronous? NO Moore state machine Input & Output FIFO equally spaced ? NO Delay between successful reading and output word: 3 cycles
FIFO(3) Operation: Altera MegaFunction One clock cycle after rdreq, data is presented at output q; usedw decrements One clock cycle after wrreq, data is latched in; usedw increments Underflow circuitry prevents data being read from an empty FIFO; FIFO blocks Overflow circuitry prevents data being wrteen to a full FIFO; FIFO blocks
Timing Diagram (Input) (FYI) (2) New sample arrives at the FIFO FIFO is ready for output (1) Read & Write are de- assetred WAITREQUEST (3) FIFO is not empty prepares for output (4) FIFO is not empty & Read command data is on the bus (5) WAITREQUEST 0 and data is read
Operating System uClinux – microcontroller implementation of Linux. Enables the incorporation of device drivers – without having to write them!
Storage/File System Utilized USB mass storage device Running as a host device on DE2 Once mounted, provides convenient storage of recordings in a “directory”
I/O programming in user space Not kernel space - no interrupts Can’t use Hardware Abstraction Layer (e.g. IORD16_Direct) To access peripherals (switches, audio) use memory pointer access
WAV Format Recording The ‘RIFF’ chunk descriptor WAVE format The ‘fmt’ sub-chunk format of the sound information The ‘DATA’ sub-chunk size of the sound information and raw sound dat
MP3 Format (MPEG 1 Layer3) MP3 is composed of succession of frames i.e. frame1 - frame2 - frame3 -…….. Each frame is totally independent, can cut any part of MPEG files and play correctly.
MP3 Frame Header
Choosing MP3 version BitsMPEG1MPEG2MPEG2.5 (ext 2) kHz22kHz11kHz 0148kHz24kHz12kHz 1032kHz16kHz8kHz 11reserved Since we want to user low sampling Rate - 8kz, we choose MPEG 2.5 Layer3 Note: The only difference MPEG 1,2,2.5 is MPEF 2 and 2.5 support more bit rate, and sampling rate. Everything else are the same.
MP3 Header in our case Length (bits)DescriptionIn our caseBits 11Frame SyncAlways MPEG Version LayerLayer301 1CRCno0 4Bit rate128k bits/sec1200 2Sampling Rate8khz10 1Paddingyes1 1Private bitOnly informative1 2ChannelMono11 2Mode extOnly used in Stereo11 1Copyrightno0 1Originalno0 2Emphasisno0
Encoding Implementation The reason to have.wav file in the transition is that the mp3 encoding algorithm is to slow to make it realtime ADC.Wav file At USB Encoding.mp3 file at USB
Encoding Implementation Take a code from shine fixed point version 1.09 which was originally used on ARM machine Strip out the part about ARM and change the part of assembly code to C in order to run under nios-uclinux Made it a function for main code to call
Decoding: Uclinux – MP3PLAY Support MPEG-1, 2, 2.5 Layer Support both fixed-point and floating-point Can use Assembly to optimize the computing Implementation: Set to use fixed-point function in mp3dec library and do not use Assembly optimization Write out PCM data to FIFO input Add header on PCM data to write to WAV
Decoding Implementation DAC.Wav file At USB Decoding.mp3 file at USB
Problems – Comments Software(Decoding): Now, we can hear artist’s vocal in the background with lots of white noise Before waitrequest function enable, it sounded like machine gun With waitrequest enabled, artist’s voice sounds retarded After we increased the FIFO size, the tempo is close to original clip Write to wav file, but cannot hear sound Write raw PCM data, listening on Matlab does not work Software(Encoding): Too slow to be real-time Inline assembly optimization Hardware mul() implementation
Problems – Comments Hardware: FIFO timing Need to synchronize bus clock (100 MHz) and S. CLK (8 kHz) Encoder/Decoder might be consuming/feeding data faster than ADC/DAC can process! Need to increase size of FIFO Asynchronous “wait” waitrequest is combinational logic; state machine is sequential Choice of Different configurations Size of FIFO’s (mp3 frame) Simulation : Initial sample of FIFO undefined at output Caused by Legacy mode (chosen as a suggestion of the software)