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Final Project Overall Design Presented By: Akram Ahmed Date: 19 November 2014 CMPE 691: Digital Signal Processing Hardware Implementation.

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Presentation on theme: "Final Project Overall Design Presented By: Akram Ahmed Date: 19 November 2014 CMPE 691: Digital Signal Processing Hardware Implementation."— Presentation transcript:

1 Final Project Overall Design Presented By: Akram Ahmed Date: 19 November 2014 CMPE 691: Digital Signal Processing Hardware Implementation

2 Outline  Filter Design  Window Design  Complex Number  Absolute Value Calculation  City Distance  Spectral Density Design  FFT Latency and selection  Overall Design

3 Filter Design  Number of Taps: 201  Max Filter Coeff =  Min Filter Coeff Value =  Coeff representation = 1.9, signed 2’s compliment

4 Window Design  Max Window Coeff = 1  Min Window Coeff Value = (non-zero)  Coeff representation = 1. 9, unsigned

5 Combined Filter and Window

6 Spectral Density

7 FFT  Number of Inputs: 1024  Target Design Frequency: 50 MHz (20ns)  FFT Latency = FFT calculation time + drain time  For Radix 2 lite  FFT Latency =  s * 20 ns = ms  For Radix 2 Burst I/O  FFT Latency =  s * 20 ns = ms  For Radix 4 Burst I/O  FFT Latency =  s * 20 ns = ms  For Pipeline Streaming  FFT Latency =  s * 20 ns = ms

8 Overall Design

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10 FIR IP Core

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13 FIR Simulation

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15 FIR Matlab f = fopen ('filtInp','w'); filtLen = length(y1); for i = 1:1:filtLen nonF = fi(y1(i),1,16,0); fprintf(f,'%s,\n', nonF.bin); fix = strcat(nonF.bin,'.0'); y1(i) = fix2dec(fix); end

16 FIR Simulated output and Matlab comp.

17 FIR input

18 Overall Design


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