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1 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Design Space Exploration of Embedded Systems © Lothar Thiele ETH Zurich.

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Presentation on theme: "1 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Design Space Exploration of Embedded Systems © Lothar Thiele ETH Zurich."— Presentation transcript:

1 1 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Design Space Exploration of Embedded Systems © Lothar Thiele ETH Zurich

2 2 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Overview Review of General Aspects Basic Models and Methods Multi-Criteria Optimization Applications

3 3 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Target Platform Heterogeneous computing and memory resources some resource types: GP processors, ASIPs (DSP, micro-controller), weakly programmable co- processors, re-configurable components, hard coded IP components heterogeneous platform software: RTOS, scheduling (pre-emptive, static, dynamic), synchronization DSP CC CC image coprocessor CAN interface SDRAM RISC FPGA

4 4 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Target Platform Communication micro-network on chip for synchronization and data exchange consisting of busses, routers, drivers some critical issues: topology, switching strategies (packet, circuit), routing strategies (static – reconfigurable – dynamic), arbitration policies (dynamic, TDM, CDMA, fixed priority) challenges: heterogeneous components and requirements, compose network that matches the traffic characteristics of a given application (domain)

5 5 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Design Space Scheduling/Arbitration proportional share WFQ staticdynamic fixed priority EDF TDMA FCFS Communication Templates Architecture # 1 Architecture # 2 Computation Templates DSP EE Cipher SDRAM RISC FPGA LookUp DSP TDMA Priority EDF WFQ RISC DSP LookUp Cipher EE EE EE EE EE EE static Which architecture is better suited for our application?

6 6 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Design Space Exploration ApplicationArchitecture Mapping Analysis This process takes place on several levels of abstraction.

7 7 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Design Space Exploration ApplicationArchitecture Mapping Analysis This talk: Exploration and Analysis on a high level of abstraction.

8 8 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Design Space Exploration ApplicationArchitecture Mapping Analysis (Semi-) Automated Design Space Exploration This talk: Exploration and Analysis on a high level of abstraction.

9 9 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Why is Performance Analysis Difficult? complex behavior - input stream - data dependent behavior I/O DSP CPU1 CPU2 task 1 task 2 task 3 task 4 interference - limited resources - scheduling/arbitration interference of multiple applications - limited resources - scheduling/arbitration - anomalies

10 10 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Simulation Target architecture co-simulation combines functional and performance validation extensive runtimes worst case inputs ? test case definition ? re-targeting expensive input trace mixed model function:application structure:hardware-software architecture output trace

11 11 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Trace-Based Simulation Steps: execution trace determined by co-simulation abstract representation using communication graph extension of graph by actual architecture Faster than simulation, but still based on single trace input trace functional model complete trace communication architecture abstract graph trace simulation estimation results [Lahiri et. al, 2001]

12 12 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Static Analytic Models Steps: describe computing, communication and memory resources by algebraic equations, e.g. describe properties of input using parameters, e.g. input data rate combine relations Fast and simple estimation Generally inaccurate modeling of shared resources

13 13 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Dynamic Analytic Models Combination between static models, possibly extended by their dynamic behavior, e.g. non-determinism in run-time and event processing dynamic models for describing shared resources (scheduling and arbitration) Variants queuing theory (statistical models, average case) real-time calculus (interval methods, worst case) More accurate than static models

14 14 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Dynamic Analytic Models input traces model of environment spec. of inputs component simulation system model estimation results data sheets model of components model of architecture

15 15 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Summary Simulation Trace-based simulation Dynamic analytic methods Static analytic methods Timing Accuracy Run-time Coverage

16 16 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Bounds, Guarantees and Predictability Example: end-to-end delay t best case worst case lower bound upper bound interference non-determinism design limited analysis design analysis techniques causesinfluences

17 17 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Overview Review of General Aspects Basic Models and Methods Multi-Criteria Optimization Applications

18 18 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Examples Event Stream Processing Core Mobile Internet Access Embedded Internet Devices ©UCB Rabaey method (a)(fsd) for I=1 to n do nothing call comm(a,dsf,*e); end for Wearable Computing

19 19 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Application Model Example of a simple stream processing task structure:

20 20 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Architecture Templates In general, we assume an arbitrary heterogeneous architecture consisting of computing resources, memory and communication resources. event events

21 21 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Mapping Model

22 22 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Allocation and Binding Allocation can be represented as a function: Binding is a relation: Binding restrictions: task1 task2 task3 task4 class filter schedule risc

23 23 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Abstraction Idea: unified view of task scheduling, arbitration and event scheduling in networks: methods: queueing theory (statistical bounds, markov chains) real-time calculus (worst case bounds, min-max algebra)

24 24 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Real-Time Calculus Example of a dynamic analytic model Characteristics yields worst case estimation results for memory, delay, throughput takes into account application structure (task graph representation) architecture and mapping (computation, communication, scheduling) environment (characterization of input traces)

25 25 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory environment model Elements of Modular Performance Analysis system architecture model architectural element model performance model mapping, scheduling applicationhardware architecture analysis

26 26 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Application HndlDecDisp Application p=1 s, j=0.2 s

27 27 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Hardware Architecture HndlDecDisp 22 MIPS10 MIPS Application HW Architecture 72 kbps p=1 s, j=0.2 s

28 28 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Mapping HndlDecDisp 22 MIPS10 MIPS Application HW Architecture Mapping 72 kbps p=1 s, j=0.2 s

29 29 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Modular Performance Analysis architectural element model performance model mapping, scheduling applicationhardware architecture analysis system architecture model environment model

30 30 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Overview Review of General Aspects Basic Models and Methods Multi-Criteria Optimization Applications

31 31 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Why Performance Analysis? ApplicationArchitecture Mapping Analysis (Semi-) Automated Design Space Exploration This talk: Exploration and Analysis on a high level of abstraction.

32 32 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Optimization with conflicting goals Multiobjective optimization: Find a set of optimal trade-offs Example: computer design resolutioncostpowersizeperformanceweight conflicts trade-offs

33 33 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Multi-objective Optimization

34 34 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Multiobjective Optimization Maximize (y 1, y 2, …, y k ) =  (x 1, x 2, …, x n ) Pareto set = set of all Pareto-optimal solutions y2y2 y1y1 worse better incomparable y2y2 y1y1 Pareto optimal = not dominated dominated

35 35 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Multiobjective Optimization (x 1, x 2, …, x n ) (y 1, y 2, …, y k ) Difficulties:  large search space  multiple optima Pareto optimal = not dominated dominated f Minimize x1x1 y1y1 y2y2 x2x2 decision space objective space

36 36 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Optimization Alternatives Use of classical single objective optimization methods simulated annealing, tabu search integer linear program other constructive or iterative heuristic methods Decision making (weighting the different objectives) is done before the optimization. Population based optimization methods evolutionary algorithms genetic algorithms Decision making is done after the optimization.

37 37 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Traditional Approaches y2y2 y1y1 transformation parameters y (y 1, y 2, …, y k ) multiple objectives single objective Example: weighting approach y = w 1 y 1 + … + w k y k (w 1, w 2, …, w k )

38 38 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Evolutionary Algorithms Principles of Evolution  Selection  Cross-over  Mutation

39 39 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory A Generic Multiobjective EA archivepopulation new population new archive evaluate sample vary update truncate

40 40 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory An Evolutionary Algorithm in Action max. y 2 min. y 1 hypothetical trade-off front

41 41 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Overview Review of General Aspects Basic Models and Methods Multi-Criteria Optimization Applications

42 42 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Exploration Cycle EXPO – Tool architecture MOSES EXPOSPEA 2 selection of “good” architectures system architecture performance values task graph, scenario graph, flows & resources Tool available online: Tool available online:

43 43 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory The Concept of PISA SPEA2 NSGA-II PAES Algorithms Applications knapsack TSP network processor design Platform and programming language independent Interface for Search Algorithms [Bleuler et al.: 2002]

44 44 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory PISA: Implementation selector process text files shared file system variator process application independent: mating / environmental selection individuals are described by IDs and objective vectors handshake protocol: state / action individual IDs objective vectors parameters application dependent: variation operators stores and manages individuals

45 45 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory PISA Website

46 46 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory EXPO - Tool

47 47 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Results Performance for encryption/decryption Performance for RT voice processing

48 48 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Validation Strategy Comparison Analytical Component Models Analytical System Model Arrival Curves Hardware Components (bus, bridge, memory, processor) Parameters Simple workloads SystemC Component Models SystemC Component Models SystemC System Model Traces Complex workloads


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