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These slides incorporate figures from Digital Design Principles and Practices, third edition, by John F. Wakerly, Copyright 2000, and are used by permission. NO permission is given to re-use or publish these figures, in either original or modified form, in printed, electronic or any other format.

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Slide Set 10 Sequential machines

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Clocked synchronous state machines: Mealy: Moore: (next state)

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Mealy machine with pipelined outputs ---resynchronized

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Flip-flop characteristic equations: DQ+ = D D with enableQ+ = D EN + Q EN’ JKQ+ = J Q’ + K’ Q TQ+ = Q’ T with enableQ+ = Q’ EN + Q EN’

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Example: analysis with state machine (D flip-flops) Goals: Characterize as Mealy or Moore machine Determine next-state as function of inputs and current state Determine output as function of current state (Moore) or as function of current state and current inputs (Mealy) Express as machine behavior as state/output table or as state diagram Formulate English description of machine behavior

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Q0+ = D0 Q1+ = D1 D0 = F (Q1, Q0, EN) D1 = G (Q1, Q0, EN) EN Q1 Q For Q1+:

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Derive truth tables from diagram EN Q1 Q next state: Q1+ Q0+ EN S01 AAB BBC CCD DDA next state: S+ Rename states 00 => A 01 => B 10 => C 11 => D EN Q1 Q ,001,0 0101,010,0 1010,011,0 1111,000,1 next state: Q1+ Q0+ output (MAX) EN Q1 Q001 AA,0B,0 BB,0C,0 CC,0D,0 DD,0A,1 next state: S+ output (MAX)

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Equivalent state diagram --- Mealy machine has outputs on transition arcs English description: Machine counts EN pulses mod 4, raises MAX when count will achieve 0 mod 4 on next clock

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Remove input connection to output logic => Moore machine X Same analysis approach: Determine next-state and output functions Express as state/output table and/or as state diagram Note: MAX = 1 only when Q1=Q0=1

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State table: State diagram: Moore machine single output column outputs in state circles ENMAX S01 AAB0 BBC0 CCD0 DDA1 next state: S+ and output (MAX) English description: Machine counts EN pulses mod 4, raises MAXS when current count is 3 mod 4.

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Can use complemented outputs to save inverters:

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State transitions --- for Mealy (MAX) and Moore (MAXS) version Output tracking input in state D independent of clock edge Mealy machine behavior

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To analyze a synchronous state machine: Determine excitation equations for flip-flop inputs Substitute into flip-flop characteristic equations to obtain transition equations Construct transition table Determine output equations Add outputs to states (Moore) or state/input combinations (Mealy) Name states and draw state diagram

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Another example: Q0+ = D0 = Q1’ X + Q0 X’ + Q2 Q1+ = D1 = Q2’ Q0 X + Q1 X’ + Q2 Q1 Q2+ = D2 = Q2 Q0’ + Q0’ X’ Y Z1 = Q2 Q1’ + Q0’ Z2 = Q2 Q1 + Q2 Q0’

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State table (Moore machine)

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00 (10, 11) 01 State diagram note alternative conventions for arc labels X alone means Y can be either 0 or 1 same as two arcs with 10 and 11 or a single arc with multiple labels

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Example: JK flip-flops J0 = X Y’ K0 = X Y’ + Y Q1 J1 = X Q0 + Y K1 = Y Q0’ + X Y’ Q0 characteristic equation: Q+ = JQ'+K'Q Q0+ = J0 Q0’ + K0’ Q0 = X Y’ Q0’ + X’ Y’ Q0 + X’ Q1’ Q0 + Y Q1’ Q0 Q1+ = Z = X Q1 Q0 + Y Q1’ Q0’

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00/0 10/0 (01,11)/1

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Design example:

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AB MeaningS Z Initial stateINIT0... AB MeaningS Z Initial stateINITA0A0A1A10 Got a 0 on AA00 Got a 1 on AA10... Establish tentative state transitions

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AB MeaningS Z Initial stateINITA0A0A1A10 Got a 0 on AA0OKOKA1A10 Got a 1 on AA10 Repeat on AOK1...

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AB MeaningS Z Initial stateINITA0A0A1A10 Got a 0 on AA0OKOKA1A10 Got a 1 on AA1A0A0OKOK0 Repeat on AOK1...

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AB MeaningS Z Initial stateINITA0A0A1A10 Got a 0 on AA0OKOKA1A10 Got a 1 on AA1A0A0OKOK0 Repeat on AOK?OKOK?1... if two equal inputs are 0, want to stay in OK else want to return to A0 if two equal inputs are 1, want to stay in OK else want to return to A1

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AB MeaningS Z Initial stateINITA0A0A1A10 Got a 0 on AA0OK0OK0A1A10 Got a 1 on AA1A0A0OK1OK10 Equal, last 0OK0OK0OK0OK1A11 Equal, last 1OK11

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AB MeaningS Z Initial stateINITA0A0A1A10 Got a 0 on AA0OK0OK0A1A10 Got a 1 on AA1A0A0OK1OK10 Equal, last 0OK0OK0OK0OK1A11 Equal, last 1OK1A0OK0OK1OK11

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Test design on input scenarios

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AB S Z INITA0A0A1A10 A0OK0OK0A1A10 A1A0A0OK1OK10 OK0OK0OK0OK1A11 OK1A0OK0OK1OK11 Assign bit patterns to the five states StateSimpleDecomposedOne-hotAlmost one-hot INIT A A OK OK Some alternatives first bit: initial or working second bit: pending or pattern recognized third bit: pending or recognized pattern with 0 or with 1

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Transition/output table (decomposed assignment) With D flip-flops, excitation table is identical to transition table Have three combinational design problems for Q1+ = D1, Q2+ = D2, Q3+ = D3

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Develop excitation equations Assume unused states have next-state = 000 => 9 NAND gates

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Assume “don’t care” for transitions from unused states: D1 = 1 D2 = Q3’ Q1 A’ + Q3 A + Q2 B D3 = A => 4 NANDS

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Same example using ABEL Note about reset inputs: –You always need a “power-on” reset input for a sequential circuit. –Previous example did not use synchronous reset because of manual-synthesis complexity. –Asynchronous reset is sometimes used (PR and CLR inputs of flip-flops).

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Note definition of “extra” states. State assignment uses simple sequential binary patterns

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“State Diagram” This essentially mimics the state table.

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Final touches Good behavior for extra states state XTRA1: GOTO INIT; state XTRA2: GOTO INIT; state XTRA3: GOTO INIT; Clock and output equations equations QSTATE.CLK = CLOCK; QSTATE.OE = 1; Z = (QSTATE == OK0) # (QSTATE == OK1); Alternative state assignments are easy –Modify state definitions and possibly output pins and extra states. –Unspecified states go to 0,0,…0.

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ABEL-derived excitation equations Equivalent to what was derived by hand, with the addition of the RESET input. Q3.FB ?? next slide

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Qualified signals from flip-flops.CLK or.Cclock.ARasynchronous clear.APasynchronous preset.OEoutput enable.Qdirect output.FBoutput after programmed inversion.PINoutput appearing on pin

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AB S Z INITA0A0A1A10 A0OK0OK0A1A10 A1A0A0OK1OK10 OK0OK0OK0OK1A11 OK1A0OK0OK1OK11 Same example use JK flip-flops decomposed assignment AB Q2 Q1 Q Z

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Separately for each AB input, add columns for excitations (Ji, Ki) for each flip-flop AB Q2 Q1 Q J2 K2J1 K1J0 K0Z Q2+ Q1+ Q0+ Q2 transitions 0 to 1 J2 K2 must command set or toggle J2 K2 = 10 or 11, i.e., 1x 1x Q1, Q0 hold 0 J1 K1, J0 K0 must command reset or hold J1 K1, J0 K0 = 00 or 01, i.e., 0x 0x

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Add columns for excitations (Ji, Ki) for each flip-flop AB Q2 Q1 Q J2 K2J1 K1J0 K0Z x0x0x x01x0x x00xx x0x00x x0x1x11 Q2+ Q1+ Q0+ Transition JK command 0 => 000 or 01 => 0x 0 => 110 or 11 => 1x 1 => 001 or 11 => x1 1 => 100 or 10 => x0

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Add columns for excitations (Ji, Ki) for each flip-flop AB = 00 Q2 Q1 Q0Q2+ Q1+ Q0+J2 K2J1 K1J0 K x0x0x x01x0x x00xx x0x00x x0x1x1 AB = 01 Q2 Q1 Q0Q2+ Q1+ Q0+J2 K2J1 K1J0 K x0x0x x01x0x x00xx x0x00x x0x0x1 AB = 11 Q2 Q1 Q0Q2+ Q1+ Q0+J2 K2J1 K1J0 K x0x1x x00x1x x01xx x0x01x x0x0x0 AB = 10 Q2 Q1 Q0Q2+ Q1+ Q0+J2 K2J1 K1J0 K x0x1x x00x1x x01xx x0x11x x0x0x0 Q2 = 0: AB xxxx Q1 Q011xxxx 10xxxx Q2 = 1: AB xxxx 01xxxx Q1 Q011xxxx 10xxxx J2 = 1 Q2 = 0: AB xxxx 01xxxx Q1 Q011xxxx 10xxxx Q2 = 1: AB Q1 Q K2 = 0

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Add columns for excitations (Ji, Ki) for each flip-flop AB = 00 Q2 Q1 Q0Q2+ Q1+ Q0+J2 K2J1 K1J0 K x0x0x x01x0x x00xx x0x00x x0x1x1 AB = 01 Q2 Q1 Q0Q2+ Q1+ Q0+J2 K2J1 K1J0 K x0x0x x01x0x x00xx x0x00x x0x0x1 AB = 11 Q2 Q1 Q0Q2+ Q1+ Q0+J2 K2J1 K1J0 K x0x1x x00x1x x01xx x0x01x x0x0x0 AB = 10 Q2 Q1 Q0Q2+ Q1+ Q0+J2 K2J1 K1J0 K x0x1x x00x1x x01xx x0x11x x0x0x0 Q2 = 0: AB xxxx Q1 Q011xxxx 10xxxx Q2 = 1: AB Q1 Q011xxxx 10xxxx J1 = Q0 A + Q2 Q0' A' Q2 = 0: AB xxxx 01xxxx Q1 Q011xxxx 10xxxx Q2 = 1: AB xxxx 01xxxx Q1 Q K1 = Q0 A B' + Q0' A' B'

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Add columns for excitations (Ji, Ki) for each flip-flop AB = 00 Q2 Q1 Q0Q2+ Q1+ Q0+J2 K2J1 K1J0 K x0x0x x01x0x x00xx x0x00x x0x1x1 AB = 01 Q2 Q1 Q0Q2+ Q1+ Q0+J2 K2J1 K1J0 K x0x0x x01x0x x00xx x0x00x x0x0x1 AB = 11 Q2 Q1 Q0Q2+ Q1+ Q0+J2 K2J1 K1J0 K x0x1x x00x1x x01xx x0x01x x0x0x0 AB = 10 Q2 Q1 Q0Q2+ Q1+ Q0+J2 K2J1 K1J0 K x0x1x x00x1x x01xx x0x11x x0x0x0 Q2 = 0: AB xxxx Q1 Q011xxxx 10xxxx Q2 = 1: AB xxxx Q1 Q xxxx J0 = A Q2 = 0: AB xxxx 01xxxx Q1 Q011xxxx 10xxxx Q2 = 1: AB xxxx Q1 Q011xxxx K0 = A'

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NAND-NAND J = Q0 A + Q2 Q0' A'J K = Q0 A B' + Q0' A' B'K JK flip-flop JQ KQ' CLR JK flip-flop JQ KQ' CLR JK flip-flop JQ KQ' CLR AB 1 0 Z = Q2 Q1 Q2 Q1 Q0 Z CLK initially GND pull-up to PWR after small time interval

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