Presentation on theme: "Si-Detector Developments at BARC"— Presentation transcript:
1 Si-Detector Developments at BARC Dr. S.K.KatariaElectronics Division,BARC, Mumbai
2 CollaboratorsM.D. Ghodgaonkar, Anita Topkar, M.Y. Dixit, V.B. Chandratre, A.Das, Vijay Mishra, V.D. Srivastava, R.V. Shrikantaiah, Acharyulu, R.K. Choudhari, Bency John,A.K. MohantyBARCH.V. Ananda, Subash Chandran, Prabhakararao, N. ShankaranarayanaBELO.P. Wadhawan, G.S. VirdiCEERIR.K. Shivpuri, Ashutosh Bharadwaj, Kirti Ranjan:DUBARC has been developing and producing Surface Barrier Silicon detectors of several types for physics experiments for decades. These have been used for charged particles, x-rays and beta particle detection in the Vandegraff and Pelletron accellerators experiments.In 1997, we started work on the development of the PIPS Silicon detectors using IC fabrication labs in the country.PIPS Detectors are passivated ion implanted Silicon detectors which have can be developed at the standard IC-fabrication facility. As these developments are carried at the commercial foundries, the process details were not available. Therefore, we started with a large development team of scientists who have been working in the area of surface barrier detector development at BARC, IC fabrication teams at CEERI and BEL, Detector Simulation groups at BARC and Delhi University with the aim to develop the Silicon detector technology in the country. This development work has now been completed with the contributions from all the institutions.
3 Plan of the TalkDevelopment of the CMS preshower silicon strip detectorSilicon Drift DetectorsSi-Detector Readout ElectronicsI shall also like to mention the contribution of micro-electronics group of IIT Mumbai who have always given us advice whenever we faced any difficulty in the development of the process.I would also like to thank the HEP community for their faith in our team that we shall be able develop the very large area Silicon strip detectors which can be used in the CMS experiment and therefore gave full financial support to the development of PIPS technology in the country.I can further say that we not only have developed Silicon strip and pixel detectors but also can design more complex Silicon Drift detectors with built in DEPJFET. Such studies are being carried out by Ph D students at BARC now.With the low noise amplification only, the benefits of the good PIPS detectors can be useful. We have developed some very low noise CMOS analog ASIC’s for use as front end applications. I shall also mention these in the last part of talk.
4 Compact Muon Solenoid CMS Coming to our participation in the CMS experiment, India CMS collaboration will be developing ¼ of the Silicon strip detectors in the Preshower Detector Subsytem and also the design of the readout electronics from these detectros.
5 Preshower Disc Total 124 x 4 = 496 Mother boards ~2.49m MB TYPE2 K ChipTotal 124 x 4 = 496 Mother boardsThe preshower detector consists of 4 discs of Si strips, 2 on each end-cap side. The picture shows one of such discs. Each rectangle represents motherboard which supports the Si strip detectors (micromodule) and accommodates the front-end electronics.
6 Advantages of silicon detectors: Fast response of the order of few nsHigh level of segmentation possible- strips, microstrips, pixels,etcHigh energy and position resolutionRoom temp operation possibleUse of silicon IC technology enables batch fabrication with very good uniformity & low cost of productionSilicon strip detector is the ideal choice for Preshower application where the position accuracy required is less than 100 micron with a pitch of 2 mm.
7 Applications of Silicon Detectors: Detection of radiation - , , , protons, neutrons, charged particles, photonsSilicon detectors with multielement geometries of strips, microstrips, pixels, etc- Physics experiments such as that at CERN, Nuclear Science experiments in our country- Astronomy ( low energy X-rays)- Medical imaging (pixel detectors)Single element detectorsSmall area diodes – area mm2Personal dosimeters / area monitors for γ-radiationNeutron dose measurement using boron coating/thin foilLow energy X-ray spectroscopy with preamp ( low noise)at –100C ( <60KeV with few 100 eV resolution)High resolution -spectroscopyCharged particle detectionLarge area diodes mm2Detection of low activity radiation such as 239 Pu in airSilicon photodiode/scintillator systemskip
8 Various types of silicon strip detectors used for high energy physics experiments & other applicationsSingle sided and double sided Strip detectors ( DC coupled, 2D Position sensing)Pixel detectors (suitable for imaging applications)Silicon microstrip detectors ( AC coupled, single or double sided)Silicon drift detectors ( high energy and position resolution, suitable for imaging applications)Monolithic active pixel detectorsSingle element detectors with high energy resolution/large sensitive areapass
9 Silicon strip/microstrip detector ( SS, DC coupled) Schematic of silicon strip.
10 Active Pixel Detectors Monolithic – Has readout inside the detector substrate Hybrid – Readout is bump bonded to the pixelpass
11 CMS Preshower Silicon Strip Detector Development (These detectors will be used as the preshower detectors for photons in the CMS at CERN).Prototype Development phase(CEERI and BEL)Preproduction (BEL)Production (BEL)Important activities involved:Detector design and fabricationDetector qualificationMicro module assemblyDuring , the R&D of the fabrication process wascarried out at CEERI,IV test equipment was developed at BARC.16 channel strip detector was demonstrated on 2-inch wafer in 1999.During , BEL started the process R&DED made CV system as well.Eight process runs were made which lead to the final processselection for meeting the requirements of PSD
12 Prototype / Technology Development 16-strip silicon detector developed at CEERI on a 2” Waferstrips of geometry 20x1.65 mm2 enclosed in three P+ guard-rings32-strip silicon detector of geometry 60x60 mm2 developed at BELstrips of geometry 60x1.69 mm2 enclosed in seven P+ guard-ringsPIN diode detectors of various areas – 3x3 mm2 – 10x10 mm2 developed at BEL along with strip detector70 diodes enclosed in two guard ringsSilent features of the silicon strip detectors with three and seven guard rings
13 Detector specifications and Detector design ElectricalBreakdown voltage for all strips >= 300V/500VTotal current of all strips =< 5 μA at full depletion voltage (VFD) and<= 10 μA at 150+VFDMaximum 1 strip with leakage current > 1 μA at VFD & > 5 μA at VFD+150VGeometricalLength mmWidth , -0.1 mmDetector specifications are very stringent as these are to be operated in a high radiation background of neutrons ( 2x10 14 /cm2) & gamma ( 10Mrad) for a long period of ten years
14 Scanned picture of BEL and CEERI Detectors ( Prototype) First MASK at BEL for 4-inch wafer and at CEERI for 2-inch wafer
15 Characterization of the strip detector Probe-jigs to make contact to the 32 strips simultaneouslySimulaneous measurement of strip current of 32 strips ( IV)Simulaneous measurement of strip capacitance of 32 strips ( CV)Probe-jigs, measurement setups were developed by BARC.Testing facility has been setup at BEL for qualification of detectors as per the CERN specificationsIC Fabs have test equipment only upto 100 volts maximum and for handling small devices 5x5 mm.We had to develop the mounts for the large area detectors, IV and CV systems for 1000 volts operation and my colleagues in ED developed the complete system for IV and CV measurements which were compared with the Keithly Instruments available at CERN and DU afterwords.
16 Argon implantation at Back plane Sacrificial Oxide Grown During the eight runs in two years we found that sacrifacial oxide growth as the first stepargon implantaion at the back plane are essential cleaning processes for very low leakage and HV devicesArgon implantation at Back planeSacrificial Oxide Grown
17 Back-Plane Ohmic Side Processing Technology Single step implantationEnergy of the ion-beam: 80 KeVDose: 7E15 ions/cm2Annealing: 30 min, 950 ºC in N2Double step implantationFirst Step:Energy of the ion-beam: 110 KeVDose: 1E15 ions/cm2Annealing: 10 min, 1050 ºC in O2 + N2Second Step:Energy of the ion-beam: 50 KeVDose: 1E16 ions/cm2For very HV operation when the detector is biased 2-3 times the full depletion voltage, double step implementaion is very useful.
18 Results of IV with and wthout double implantation
20 Reverse IV characterstics of all 32 strips of a detector ( production phase)
21 Capacitance vs Voltage Characterstics of all 32 strips of a detector ( Production phase)
22 Measurement carried out till 500V, BV is > 500V Full depletion depth voltage changes by +-10% only.
23 Total leakage current at VFD is .1 Microamps and at 300 V is aboout 1 microamps over the large area of 40 cm2
24 Scribing process is also well established, not much wastage during the scribing process and testing as well.
25 Micromodule assemblyThe detector is mounted on the ceramic which would have the radiation hard front end hybridThe ceramic is mounted on an aluminum tileAlignment accuracy of about 100 microns is requiredMechanical jigs would be used for alignmnet during assemblyReady for the module making but yet to receive the final procedure details from CERN
27 Fabrication of Detectors of modified geometry (63 × 63 mm2) The first batch of detectors using Mask2 and Mask3 has been fabricated at BEL. The processing steps for fabrication of the detectors are the same as the one concluded after batch-7 andrepeatability affirmed after batch 8We have designed two masks for the production batches one with seven guard rings and another with four guard rings.We are using four guard rings one as it gives better yield upto percentIV characteristics of 32 strips a 63 × 63 mm2detector fabricated at BELComposite diagram for all the layers of Mask2
28 Doping Profile after each of thermal treatment Simulation StudiesOne of the most difficult yet important aspects of TCAD simulation is proper calibration of TCAD tool with respect to the foundry. The difficulty arises from the large number of variables that can be adjusted in the simulator. Many discrepancies between experimental and simulation results can be resolved by proper understanding of the limitations of the simulators. In particular, the grid, boundary conditions, and the various models, all of which are user-selectable, can have a dramatic impact on the simulation results. The various aspects of grid selection, boundary conditions and model coefficient values were taken into account while comparing the simulation results with the experimental values.Process simulations have been carried out for designing process for shallow junction depth at BEL. The simulated process flow is being implemented at BEL for detector optimization for charged particle spectroscopy applications.The cross-section of the simulated device showingdifferent layers and contour for the junction depthDoping Profile after each of thermal treatment
29 Silicon Detectors with Inbuilt JFET Simulation Studies & Design An extension of PIN diode development workFabrication of JFET along with PIN diode detector avoids stray capacitances and micro phonic noise pickupsSDD is based on the lateral charge transport scheme. The signal charge generated by radiation is collected by a small area anode (small capacitance≈ 0.1pF). The capacitance of the detector is independent of the detector areaThese detectors can be cooled down to -20ºC that would give energy resolution of ≈180 eV ( PIN diodes) and ≈150 eV (SDD)In the last decades several new silicon detector have been developed for physics experiments and for x-ray imaging in biomedical imaging. With experience gained, we are initiating this activity to develop systems for HEP and Industrial users. We have carried out simulation in detail for the development of SDD.
30 Radial Cross Section of SDD & JFET Based on the published data, we have carried out the simulation with the calibrated simulators used in earlier PIPS program
31 Process SimulationsFabrication of the proposed detectors require 10 Masks layersBack plane alignment neededProcess simulations for fabrication of the detectors have been carried out and implant energy, dose values and temperature cycles have been studiedStarting substrate : 4 KΩ-cmP-well : 1E12 80 KeVN-channel : 8E12 80 KeVP+ Gate :1E14 60 KeVN+ Source & Drain :1E15 80 KeVThe temperature cycles are CLong annealing temperature cycle to recover the bulk carrier life time.PIPS process is simpler only fivce masks are involved but in SDD it is nearly nine mask processes.These processes are available at BEL where we are planning to carryout the R&D and process optimisation
32 Radius=1.2 mmDia = 2.4 mmArea = 4.5 mm2Chip will be around 1 cm2Resistor, L=50, W=40, resistance value=600 K
35 N-JFET Characteristics Cgs=0.2 pFCgd=0.2 pFGate curr=0.2 pA
36 Silicon Drift Detector with Integrated Front-end electronics Low noise operation with large active areaEnergy and position sensing capabilityHigh energy resolution ~150eVHigh position resolution ~ 11 mHigh count rate capability 2e6 cps/cm2Applications of Silicon drift detectorsX-ray & -ray SpectroscopySimulation studies for SDD and inbuilt JFET completedAnalog X-ray AcquisitionSystem (AXAS)
37 CMOS ASIC from SCL Concept to CHIP Full custom designsDETECTOR(S)FRONT END DOSIMETER ASIC.CODAOCTAL Charge PreampOCTPREMFour low noise ASIC are undergoing tests.The prileminary results show about electron noise in our CMOS charge amplifiersFor different applications the dynamic range is different and detector capacitance is different and therefore we variety of ASIC,s8 CHANNEL SILICON STRIP PULSE PROCESSOR. SPAIR8 CHANNEL CURRENT PULSE PREAMPLIFIER MICON
40 MICON Error amp out I to V &SHAPER/ Buffer bias in ref KEY FEATURES FICONbiasKEY FEATURESLEAKAGE CURRENT COMPENSATIONIDEAL FOR PROPORTIONAL CHAMBERS,GEM, PMTS50 NS PEAKING TIME1800 e RMS noise8 CHANNELS WITH SERIAL ANALOG READOUT
41 The process technology for large area silicon detectors has been successfully developed and silicon strip detectors meeting all the electrical and technological specifications for it’s qualification as preshower sensors have been producedThe leakage current in detectors is around 2-5 nA/cm2 and breakdown voltage is in excess of 500VThe approach of employing gettering techniques during fabrication has sustained the bulk effective carrier lifetime to high value > 10 msThe injection of carriers from the back plane at full depletion voltage which was the major problem for high voltage operation of the detectors has been effectively tackled by incorporating double implantation at back side so as to have thicker and uniform n+ layerthe strip detectors that show high leakage current in strips can become usable detectors with one of the Guard Rings groundedGuardring collects most of the signal charge generated close to or outside of the active area avoiding the number of interactions in which imperfect or incomplete charge collection would occur.Simulation studies for designing Silicon Drift Detector with integrated N-JFET have been done and results are presentedThe small area silicon diode detectors that have been produced as spin offs of the strip detector fabrication process have been evaluated and they show excellent static and performance characteristics. These diode detectors have given energy resolution of 2.8 KeV for 60 KeV γ-rays and 45 to 50 KeV for 5 MeV α particles . These PIN diode detectors have been packaged for use in various applications like low energy X-ray spectroscopy, α-spectroscopy, dosimetry, area monitoring etc in BARC and are also made commercially available at BEL for other labs.
42 Preshower Readout Architecture The transparency shows the readout architecture of the preshower. The front-end electronics shown within dotted lines is incorporated on motherboards and installed in the CMS detector. The micromodules having Si strip detectors and front-end electronics in the form of ASIC called PACE are mounted on the motherboards. The DDU and FEC modules are installed in the counting room.We have developed Si strip detector and have undertaken its production.We have also contributed in development of front-end ASICs on the preshower motherboardcalled PACE and the K chip.We have made the draft specifications of the DDU and have begun work on its design using the DCC board.
43 DDU Functional Requirements Optical to electrical conversion & de-serialization of incoming data streamsIntegrity verification of incoming data packets/event fragmentsData reformattingData reductionDDU event formationTransmission of DDU events to the global DAQ through the S-Link64 interfaceTransmission of spying events to the local DAQ through VME interface
45 Data Processing in DDU Pedestal Subtraction Common mode noise SubtractionThreshold ComparisonSynchronization CheckDeconvolutionα = Y1 v0β = Y1 v1 + Y2 v0γ = Y1 v2 + Y2 v1 + Y3 v0Charge ExtractionQ = W1 v1 + W2 v2Data concentration and output formatting
46 DDU Output Data Format Header _BOE: Begin Of Event 4 bits _FOV FOrmat Version 4 bits_LV1_id Trigger Number 24 bits_BX_id Bunch Number 12 bits_Source_id Source Id 12 bits_Evt_ty Event Type 4 bitsTrailer_Evt_lgth Event size in 64 bit words 24 bits_Evt_stat Event status 8 bitsIntegrity CRC 16 bits
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