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Interconnect Intermittency Detection with SJ BIST™

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1 Interconnect Intermittency Detection with SJ BIST™

2 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.comAgendaAgenda 2  What is SJ BIST?  Interconnect Reliability – Background  SJ BIST Basics  SJ BIST Operation  SJ BIST Application  Summary & Conclusions

3 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com What is SJ BIST? 3  SJ BIST = Solder Joint Built-in Self-Test  Original solution enabling the verification and validation of solder joint interconnect reliability  Originally developed for FPGA-BGA applications  Can be applied to validate the integrity and reliability of any type of interconnection

4 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com BGA – PCB Relationship: Die, package, wiring, pins 4

5 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com Defects: Location of Cracks/Fractures  Corner pins likely to fail first  High stress areas, and corners of the BGA package and die 5

6 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com Solder Balls, Cracks and Fractures 6

7 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com  Fatigue fractures (cracks) are caused by thermo-mechanical stress/strain  During periods of high stress, fractured bumps tend to momentarily open and cause intermittent faults of high resistance for periods of ns to µs  Over time, contamination and oxidation films occur on the fractured faces: the effective contact area becomes smaller and smaller  Transient opens can be detected by event detectors Mechanisms of Failure 7 Oxide-covered area

8 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com Mechanics of Failure HALT results - Pulled FPGA – Damaged Solder Balls Undamaged Damaged: CrackedCracked, not detectableFractured, detectable 8

9 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com Fractures and Intermittency 9

10 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com Defects: Fractures & Intermittency 10

11 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com  Faults are intermittent: confirmed by CAVE, Auburn Univ., German automobile manufacturer, BAE Systems and other firms  Occur during periods of increasing strain  Multiple occurrences per cycle  Industry standard: 200 ohms +, 200 ns + Intermittent Faults 11

12 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com  With present technology, reported electronic system problems in the field cannot be duplicated at the service point or in the lab  “Three/Four-letter” words (CND, NTF, RTOK)  Could Not Duplicate (CND)  No Trouble Found (NTF)  Retest OK (RTOK)  50 to 80% of these CND/NTF/RTOK problem categories are reported by service personnel.  Major culprits – Solder joint intermittencies and NBTI effects in deep submicron ICsIntermittenciesIntermittencies 12

13 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com  Objectives  Detection of impending interconnect failures  Unique in-situ testing in operating circuits  Technology-independent  Feature and Benefits  Detects ball fractures prior to catastrophic failure of circuit  Provides actionable maintenance data  Independently tested and verified  Endorsed by leading automotive and aerospace customers SJ BIST Objectives & Features 13

14 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com  SJ BIST runs concurrently with host circuit  SJ BIST requires dedicated I/0 SJ BIST Implementation SJ BIST Functional Circuitry Functional I/O SJ BIST I/O SJ BIST Control 14

15 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com  SJ BIST runs concurrently with host circuit  SJ BIST requires dedicated I/0 SJ BIST Implementation SJ BIST Functional Circuitry Functional I/O SJ BIST I/O SJ BIST Control 15

16 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com  SJ BIST runs concurrently with host circuit  SJ BIST requires dedicated I/0 SJ BIST Implementation SJ BIST Functional Circuitry Functional I/O SJ BIST I/O SJ BIST Control 16

17 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com  Similar to a simple memory test: W0 – R0; W1 – R1  Runs concurrently with host circuit  Verilog/VHDL core (patent pending)  Each core tests two I/O pins  Pins are externally wired together  Small capacitor connected to the two pins SJ BIST™ Operation 17

18 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com SJ BIST Operation Writes a “1” and reads a “1” Healthy Solder Joint 18

19 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com SJ BIST Operation Writes a “1” but reads a “0” Faulty Solder Joint 19

20 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com  Function of operating frequency & desired sensitivity SJ BIST Capacitor 100 Ohm 300 Ohm 10 Ohm 20

21 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com SJ BIST Application SJ BIST Interconnect path On-chip interconnects Die to substrate (incl. bumps) Die to board (incl. bumps & balls) Requirement: Interconnect path dedicated for SJ BIST 21

22 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com SJ BIST Application Testing On-chip Interconnect Need for dedicated on-chip path between SJ BIST™ Observation pins 22

23 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com SJ BIST Application Testing Die to Substrate 23

24 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com SJ BIST Application Testing Die to Board 24

25 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com  LVTTL − Low Voltage TTL SJ BIST Simulation Results Input Low ≤0.8V High ≥2.0V Output Low ≤0.4V High ≥2.4V 25

26 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com SJ BIST Simulation Results Capacitor charging  Clock = 50 MHz  Charge pulse t=20 ns  C 1 =57 pF (47 pF capacitor)+(10 pF of the I/O port and wires)  The time constant  = R 1 ·C 1 and t determine the charge voltage  In the prohibited zone (0.8 to 2.0 V) there is guaranteed detection R 1 =175ΩR 1 =700Ω 26

27 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com SJ BIST Simulation Results Voltage across the test capacitor One bump is connected with a 700 Ω resistor. So the time constant  = R 1 ·C 1 increases and the test capacitor is charged with only 0.8 V. A logical ‘0‘ instead of a ‘1‘ is read, a fault is detected. 700 Ω Fault: Same as electrical model and PSPICE simulation 27

28 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com  SJ BIST specifications  Sensitivity: as least as low as 100 Ω  Resolution: guaranteed two clock periods  Detectable intermittency: as short as ½ of a clock period  50 MHz clock  40-ns guaranteed detection  10-ns detection possible SJ BIST Application Results 100 Ω fault 1 MHz clock 28

29 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com  Independent test results by German automotive firm  Confirmed the same results as obtained by Ridgetop Group  No false alarms SJ BIST Application Results 29

30 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com  Input (Control)  Clock, Enable & Reset  Test Pins  2 bidirectional I/O pins: TP0 & TP1  Output (to host)  Failure Flags (fault was detected on TP0/TP1)  Active fault flags (fault is active on TP0/TP1 at the moment of interrogation of SJ BIST)  Failure counts (2 8-bit values related to number of faults detected on TP0 and TP1 respectively) SJ BIST I/O 30

31 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com  Available as:  Verilog/VHDL core  Microcontroller code  Requires dedicated I/O + capacitor  Runs concurrently  Interconnect reliability verification  Process qualification  Lifetime observation SJ BIST Summary 31

32 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com SJ BIST HALT for Process Qualification 32

33 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com Contact Information Hans Manhaeve Office: Ridgetop Group, Inc West Ina Rd. Tucson, AZ

34 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com Ridgetop Products and Services 34

35 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com Sentinel Silicon Prognostic Cores NBTI TDDB Hot Carrier Radiation Exposure Sentinel Silicon Prognostic Cores NBTI TDDB Hot Carrier Radiation Exposure Ridgetop SPI Products & Services InstaCell™ Mixed Signal Cores ADC – Analog to Digital Converters DAC – Digital to Analog Converters Op Amps, References,and Comparators InstaCell™ Mixed Signal Cores ADC – Analog to Digital Converters DAC – Digital to Analog Converters Op Amps, References,and Comparators nanoDFM Verification Monitors PDKChek™ - Die-Level Process Monitors Mismatch: ∆V T, ∆I(on), ∆R, ∆C, YieldMaxx™ - Die-Level Variation Visualization nanoDFM Verification Monitors PDKChek™ - Die-Level Process Monitors Mismatch: ∆V T, ∆I(on), ∆R, ∆C, YieldMaxx™ - Die-Level Variation Visualization InstaBIST™ Test Cells SJ-BIST BGA Solder Joint Built-in Test ADC-BIST Self-testing Data Converters InstaBIST™ Test Cells SJ-BIST BGA Solder Joint Built-in Test ADC-BIST Self-testing Data Converters ProChek Semiconductor Process Characterization System - NBTI- PBTI - TDDB- Hot Carrier - Radiation- Stress Migration - V T Degradation- Electromigration ProChek Semiconductor Process Characterization System - NBTI- PBTI - TDDB- Hot Carrier - Radiation- Stress Migration - V T Degradation- Electromigration Q-Star Test™ Current Monitors I DDQ I DDT I SSQ On-chip & On-board Single- & multi-site Q-Star Test™ Current Monitors I DDQ I DDT I SSQ On-chip & On-board Single- & multi-site Design Services ASICs Cores Radiation-hardening MEMS Custom instruments Design Services ASICs Cores Radiation-hardening MEMS Custom instruments TopAct® Radiation Transport Analysis Acceleration TopAct® Radiation Transport Analysis Acceleration

36 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com Advantages of PDKChek DLPM Scribe Line Transistor PDKChekScribe Line Transistors Uses test structure on the host die Requires additional test fixture Testing can occur pre- and post-packaging Lost when wafers are sliced Performs quick production test Delicate probe measurement: inaccurate and time-consuming Measures parameters that are useful to the designer May not directly measure important parameters; needs additional characterization Data is application- specific DUTs are extracted from the host design PDK models may not provide accurate predictions 36

37 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com Example: Product Yield Analysis of 90nm Process PDKChek embedded in the ADC Example of GDSII Layout for the Ridgetop 14-bit Pipeline ADC 37

38 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com Chip-Level Prognostic Solutions and Applications Products described herein are covered by U.S. patents: 7,239,163 7,196,294 7,271,608. Other patents are pending. Prognostic Cell Library Some Target Applications NBTI CellFlash memory, SRAM HCI Cell ADCs, biasing circuits, analog, and slow-speed switching circuits TDDB CellFlash memory Metal Migration Cell Damascene process stress, high current density application

39 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com What is ProChek? ProChek is an innovative low-cost technique to very rapidly characterize the intrinsic reliability of deep submicron nanotechnology CMOS processes (bulk CMOS, SOI and SiGe) 39

40 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com Characteristics of ProChek  Targets bulk CMOS, SOI, SiGe reliability concerns  NBTI / PBTI, TDDB, HC, EM, SM, TID  Test Coupon  As little as 1 * 1 mm chip area  MPW for lower cost  32 – 1024 devices can be tested in parallel for maximum throughput  On-chip per transistor heaters to 325 °C, greatly reducing test time  Synthesizable (except for on-chip heaters) to speed deployment  Benchtop Tester  Fully programmable test conditions cover DC and AC stress cases  Portable and compact  ATE not needed  Host Controller  Easy-to-use software GUI  Rich suite of built-in reliability test templates  Data processing capabilities 40

41 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com The cores provided by Ridgetop are "Silicon Proven" and have documented reports available. Ridgetop has designed cores for use in the IBM, TSMC, and AMI processes.  Analog-to-Digital Converter (ADC) Cores  Digital-to-Analog Converter (DAC) Cores  Bandgap Reference (BGR) Core  Op-amp Core InstaCell™ IP Core Library 41

42 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com Ridgetop maintains a complete Cadence design flow, and has designed circuitry down to the 45 nm process node. Ridgetop also has a line of predesigned and characterized IP blocks that can be used to accelerate the time-to-market for your systems. Examples include precision bandgap references, op-amps, comparators, ADCs, DACs and test structures. Our design services include:  Analog/mixed-signal and gate array integrated circuits with varying process nodes of 0.5 μm down to 45 nm  High-speed, high performance, high linearity ADC and DAC design  Fuel Cell and Battery Management System components  FPGA-based designs, from basic specification to gate level, with timing analysis and programming  IP blocks of specialized functionality  Modeling and simulation  Completion of back-end design from existing EDIF/SPICE to GDSII layout  Rescaling “legacy” designs to smaller process geometries  Radiation-hardened/foundry-specific designs Design Services 42

43 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com Q-Star Test  I DDQ,I DDT, I SSQ and other precision current measurement instruments for characterization and test  On-board modules and on-chip sensors  Test and DFT consulting and training services  70 semiconductor companies and 700 instruments installed  Developed by Ridgetop Europe

44 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com 44 Q-Star Test Measurement Solutions  Static (Quiescent) Current Measurement Instruments (I DDQ /I SSQ )  Standard and advanced IDDQ tests  Stand-by current measurements  Power-down current measurements  Bias current measurements  Average current measurements  Analog DC and low frequency current measurements  ….  Dynamic Current Measurement Instruments (I DDT )  Dynamic and transient (IDDT) current tests  Power profiling of circuits and systems  Active current consumption  E-fuse programming validation  …

45 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com Why Ridgetop? Ridgetop Group Delivers World Class Engineering Staff (All project contributors PhD or advanced degree) World Leaders in Electronic Prognostics (Awarded most gov’t contracts) Domain Expertise (Expansive portfolio of electronic prognostic solutions) IP Easily Configured to Target Applications (Seamless integration and porting) Customer Service (Dedicated service and support personnel for on demand assistance) Commitment to Innovation (Strive to improve/upgrade existing IP)

46 3580 West Ina Road | Tucson AZ | | | ridgetopgroup.com For more information about Ridgetop’s products and capabilities please visit: 46


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