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AT94 Training 2001Slide 1 FPSLIC- Embedded MCU Core 8 Bit RISC MCU Industry’s Highest 8-bit Performance A Real 8-Bit RISC Architecture Low Power ( idle/power.

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Presentation on theme: "AT94 Training 2001Slide 1 FPSLIC- Embedded MCU Core 8 Bit RISC MCU Industry’s Highest 8-bit Performance A Real 8-Bit RISC Architecture Low Power ( idle/power."— Presentation transcript:

1 AT94 Training 2001Slide 1 FPSLIC- Embedded MCU Core 8 Bit RISC MCU Industry’s Highest 8-bit Performance A Real 8-Bit RISC Architecture Low Power ( idle/power down/power save ) A broad Family of MCUs ( over 35 Products ) A Variety of Peripherals Excellent C Language Code Density In-System Programmable SRAM Large Applications Database

2 AT94 Training 2001Slide 2 Register File R0 R1 R2 R3 Register File R26 R27 R28 R29 R30 R31 X Pointer Y Pointer Z Pointer XL XH YL YH ZL ZH 32 Registers give good C code density X, Y, Z pointers used by compilers for high density C code especially in loop constructs and pointer based code

3 AT94 Training 2001Slide 3 Direct Register - ALU Connection Register File ALU Register operations take ONE clock pulse on the EXTERNAL clock input

4 AT94 Training 2001Slide 4 Compare Two 32-Bit Values cpr0,r4 cpcr1,r5 cpcr2,r6 cpcr3,r7 At the end, the Status Register Indicates Equal, Higher, Lower, Greater (signed), Less Than (signed). Besides, it takes only 4 instructions and 4 clock cycles to do it... Example: Compare R3:R2:R1:R0 and R7:R6:R5:R4

5 AT94 Training 2001Slide 5 What makes the AVR better? A lot of registers - eliminate moves to and from SRAM Single Cycle execution 127+ powerful instructions available Excellent support for 32/16-bit arithmetic's. (Zero-Flag) Propagation

6 AT94 Training 2001Slide 6 Subtract Two 16-Bit Values Without Zero Flag Propagation R1:R0 - R3:R2 ($E104 - $E101) R1R0 E1 sub r0,r2 03 Z 0 sbc r1,r E104X 1Wrong!

7 AT94 Training 2001Slide 7 Subtract Two 16-Bit Values With Zero Flag Propagation R1R0 E1 sub r0,r2 03 Z 0 sbc r1,r E104X Correct! R1:R0 - R3:R2 ($E104 - $E101)

8 AT94 Training 2001Slide 8 I/O Mult Timer2Timer0Timer1 UART0UART12-Wire WD IT 8 Bit RISC MCU FPSLIC- Embedded Fixed Peripherals

9 AT94 Training 2001Slide 9 UART0UART1 FPSLIC- Embedded Fixed Peripherals UART Features Full Duplex 8 or 9 Data Bits Framing Error Detection False Start Bit Detection Noise Canceling High BAUD Rates at low XTAL Frequencies E.g. 115,200 Baud at MHz Can run at Practically any Baud Rate Multi-processor Communication mode Three Interrupts with Separate Vectors

10 AT94 Training 2001Slide 10 UART0UART12-Wire 8 Bit RISC MCU 2 Wire interface Features Master/Slave support Transmitter/Receiver Up to 400Khz bus clock rate FPSLIC- Embedded Fixed Peripherals

11 AT94 Training 2001Slide 11 Timer0 2-Wire 8 Bit RISC MCU Timer/counter0 8-Bit Overflow Interrupt Output Compare Function with Interrupt 8-Bit PWM Function FPSLIC- Embedded Fixed Peripherals

12 AT94 Training 2001Slide 12 Timer1 2-Wire 8 Bit RISC MCU FPSLIC- Embedded Fixed Peripherals Timer/counter1 16-Bit Overflow Interrupt Output Compare Function with Interrupt Input Capture with Interrupt and Noise Canceler 10, 9 or 8-Bit PWM Function

13 AT94 Training 2001Slide 13 Timer2Timer1 8 Bit RISC MCU Timer/counter2 8-Bit Overflow Interrupt Output Compare Function with Interrupt 8-Bit PWM Function Real Time Clock function ( Xtal2) FPSLIC- Embedded Fixed Peripherals

14 AT94 Training 2001Slide 14 Timer2Timer0Timer1 UART0 WD 8 Bit RISC MCU Watchdog/Timer Clocked from Internal 1 MHz RC Oscillator Time-Out Adjustable 47ms - 6s. Watchdog Timer Reset is done by executing the “WDR” instruction FPSLIC- Embedded Fixed Peripherals

15 AT94 Training 2001Slide 15 Timer2Timer0Timer1 WD IT 4 External Interrupts Short Response Time (4 Clock Cycles + RJMP to Routine) Automatic Interrupt Flag Clearing Automatic Disable of Other Interrupts Inside the Interrupt Routine FPSLIC- Embedded Fixed Peripherals UART0 8 Bit RISC MCU

16 AT94 Training 2001Slide 16 Mult Timer2Timer0Timer1 UART0UART12-Wire WD 8 Bit RISC MCU Hardware Multiplier 8x8 in 2 clock cycles IT FPSLIC- Embedded Fixed Peripherals

17 AT94 Training 2001Slide 17 I/O Mult UART0UART12-Wire WD I/Os Push-Pull Drivers configurable Current Drive (6 or 20 mA) Pinwise Controlled Pull-Up Resistors Pinwise Controlled Data Direction Fully Synchronized Inputs Three Control/Status Bits per Bit/Pin Real Read-Modify-Write Up to 16 AVR I/Os (port D and E) IT FPSLIC- Embedded Fixed Peripherals

18 AT94 Training 2001Slide 18 AVR Designs AVR Studio can be used with Assembly or C to debug code A HEX file is then used to program the AVR AVR Studio Instruction Set Simulator Requires an Assembly or C Compiler 8 Bit RISC MCU

19 AT94 Training 2001Slide 19 C - COMPILER Support IAR ( ) Approx. $1500 ImageCraft ( ) Approx. $200 Codevision V (infotech.ir.ro) Approx. $150 Others coming ( Can be Launched Directly from System Designer )

20 AT94 Training 2001Slide 20 FPSLIC-AVR Debugger Easy to Use Windows interface C and Assembly source level debugging Auto- stepping Break points Watch variables View registers View memory map View processor states View Peripheral states Cycles/time count


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