Presentation is loading. Please wait.

Presentation is loading. Please wait.

RLH - Spring 1998ECE 611 A8051 - 1 8051 Assembly Language ECE 611 Microprocessor Systems Dr. Roger L. Haggard, Associate Professor Department of Electrical.

Similar presentations


Presentation on theme: "RLH - Spring 1998ECE 611 A8051 - 1 8051 Assembly Language ECE 611 Microprocessor Systems Dr. Roger L. Haggard, Associate Professor Department of Electrical."— Presentation transcript:

1 RLH - Spring 1998ECE 611 A Assembly Language ECE 611 Microprocessor Systems Dr. Roger L. Haggard, Associate Professor Department of Electrical and Computer Engineering Tennessee Technological University Spring 1998

2 RLH - Spring 1998ECE 611 A Outline l 8051 Programmer’s Model l Addressing Modes l Data Movement Instructions l Arithmetic Instructions l Logical Instructions l Shift Instructions l Bit Manipulation l Program Control Instructions

3 RLH - Fall 1997RLH - Spring 1998ECE 611 A Introduction l 8 bit Data bus, 16 bit Address bus l Many Special Function Registers (SFRs) for control and I/O

4 RLH - Fall 1997RLH - Spring 1998ECE 611 A Code Example ORG 440h Dat DB 0FFh ; in Program Memory Wait EQU 35 Myword DW 1234h ;in Program Memory ORG 0 Start: MOV A,#2Ch ; Acc 2C INC R2 ; R2 R2+1 SETB P0.7 ; Port 0 Bit 7 1 ADD A,Wait ; A Acc + M(35) ; M(R0) M(R0) - 1 LJUMP Finished ; PC Finished Finished : General Format Label: Opcode dest,src ; Comments

5 RLH - Fall 1997RLH - Spring 1998ECE 611 A Programmer’s Model (1) Program Memory OR FFFF 0000 FFFF FFF if EA = HIif EA = LO All instructions Constant Data (Using MOVC) 64 K External 60 K External 4 K Internal Data Memory SFRs RAM 80 FF 00 7F AND Direct Direct, Register, Reg. Indirect FFFF K External Internal

6 RLH - Fall 1997RLH - Spring 1998ECE 611 A Programmer’s Model (2) Port 0 Stack pointer Data pointer DPTR Power Control timer/counter control timer/counter Mode timer 0 Low timer 1 Low timer 0 High timer 1 High Port 1 Serial Control Serial Data Buffer Port 2 Interrupt Enable Ctr 1* IE * P2 SBUF * SCON * P1 * TH1 * TH0 * TL1 * TL0 TMOD * TCEN PCON DPH DPL SP * P A 8B 8C 8D A0 99 A8 * P3 * IP * PSW * ACC * B F0 FF E0 D0 B8 B0 SFRs 7F Scratch Pad Area RAM Bit Addressable RAM Bank 3 Bank 2 Bank 1 Bank 0 R0 R7 R0 R7 R0 R7 R0 R7 Select Bank with PSW.4,.3 = RS1, RS0 Bit #00 7F OR F.7 * = Bit Addressable

7 RLH - Fall 1997RLH - Spring 1998ECE 611 A Addressing Modes (1) l Immediate - # Label or Number MOV R6,#14 ; R MOV A,#0CAh ; Acc CA 16 MOV DPTR,#loc ; DPTR value of symbol “loc” l Direct - Label or Number MOV PSW,R5 ; M(PSW) R5 MOV A,045h ; Acc M(45 10 ) l Register - Rn MOV R1,A ; R1 Acc MOV B,R3 ; B R3

8 RLH - Fall 1997RLH - Spring 1998ECE 611 A Addressing Modes (2) l Register @DPTR ; M(R0) MOV ; A M(R1) ; External data M(DPTR) A l Register Indirect MOVC ; A ROM(A+DPTR) MOVC ; A ROM(A+PC) ; PC (A+DPTR) l Bit - bit number or label.bit or bit label MOV C,IE.0 ; cy bit 0 of IE reg (EX0) MOV C,EX0 ; same SETB 07Fh ; Bit 7F 1 SETB 2F.7 ; same

9 RLH - Fall 1997RLH - Spring 1998ECE 611 A Instructions l Instruction Classes –Data Movement –Arithmetic –Logical –Shift –Bit Manipulation –Program Control

10 RLH - Fall 1997RLH - Spring 1998ECE 611 A Data Movement - 1 MOVR, #Rn D A l MOVE MOVA, #A Immediate D A Direct RA Register Indirect MOVD, #Direct D A #Register Indirect D A

11 RLH - Fall 1997RLH - Spring 1998ECE 611 A Data Movement - 2 l Move External Data RAM A l Move From Program Memory Rom(A+DPTR) Rom(A+PC) l Others PUSHDSP SP+1, m(SP) D POPDD m(SP), SP SP - 1 XCHA, RSWAP Acc Rn

12 RLH - Fall 1997RLH - Spring 1998ECE 611 A Arithmetic - 1 ADDCA, #Acc A+Immediate+Carry D l Add/Subtract ADDA, #Acc A+Immediate D SUBBA, #Acc Acc-Immediate-Carry D

13 RLH - Fall 1997RLH - Spring 1998ECE 611 A Arithmetic - 2 l Inc/Dec INCAAcc Acc+1 D DECAAcc Acc-1 D l Mul/Div MULABB:A Acc * B (unsigned) DIVABA Quo ( A/B ) (unsigned) B Rem( A/B )

14 RLH - Fall 1997RLH - Spring 1998ECE 611 A Logical l Other CLRAAcc 0 CPL AAcc Acc SWAPAAcc(7-4) Acc(3-0) l AND,OR,XOR ANDA, # ORL D XRL D, A D, #

15 RLH - Fall 1997RLH - Spring 1998ECE 611 A Shift l Rotates RLA RLCA RRA RRCA Acc C C

16 RLH - Fall 1997RLH - Spring 1998ECE 611 A Bit Manipulation - 1 l Clear/Set/Complement CLRCCarry 0 bit bit 0 SETBC bit CPLC bit l And, Or, Move ANLC, bitCarry Carry AND bit C, /bit Carry Carry AND bit ORLC, bit C, /bit MOVC, bit bit, C

17 RLH - Fall 1997RLH - Spring 1998ECE 611 A Bit Manipulation - 2 l Jump JClabelJump if Carry set JNClabelJump if Carry clear JBbit, labelJump if bit set JNBbit, labelJump if bit clear JBCbit, labelJump if bit set, then clear bit label = PC relative (+ 127)

18 RLH - Fall 1997RLH - Spring 1998ECE 611 A Program Control - 1 l Jump AJMPlabel-AAbsolute Jump- 11 bits(2K) LJMPlabel-L Long Jump - 16 bits (64K) SJMPlabelShort Jump Indirect PC (A+DPTR) JZlabelJump if zero JNZlabelJump if not zero l Compare and Jump CJNEA, #, labelCompare 1 st op to 2 nd op and A, D, label jump to label if not Equal R, #, label

19 RLH - Fall 1997RLH - Spring 1998ECE 611 A Program Control - 2 l Decrement and Jump DJNZR, labelRn = Rn-1, Jump if not zero D, label l Subroutines ACALLlabel-AAbsolute Call - 11 bits (2K) LCALLlabel-L Long Call - 16 bits (64K) RETReturn from Subroutine RETIReturn from ISR PC m(SP), SP SP-2


Download ppt "RLH - Spring 1998ECE 611 A8051 - 1 8051 Assembly Language ECE 611 Microprocessor Systems Dr. Roger L. Haggard, Associate Professor Department of Electrical."

Similar presentations


Ads by Google