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Analog and Low-Power Design Lecture 20 (c) 20031 Lecture 20 Current Source Biasing and MOS Amplifier Design Michael L. Bushnell CAIP Center and WINLAB ECE Dept., Rutgers U., Piscataway, NJ Temperature and supply-independent biasing Temperature and supply-independent biasing OPAMP design OPAMP design Summary Summary

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Analog and Low-Power Design Lecture 20 (c) 20032 Temperature and Supply- Independent Biasing Biasing must also be independent of process variations Biasing must also be independent of process variations – Critical for MOS circuits Bias I fluctuations with T, V DD, and process cause wasted energy Bias I fluctuations with T, V DD, and process cause wasted energy Supply-independent biasing is important Supply-independent biasing is important – Avoid injecting high-f noise on power lines into circuit signal path

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Analog and Low-Power Design Lecture 20 (c) 20033 Supply-Independent Biasing Refer bias circuit to potential other than V DD : Refer bias circuit to potential other than V DD : V t – threshold voltage of MOSFET V bg – band-gap voltage V t of dissimilar devices V BE of parasitic bipolar transistor in CMOS V T – thermal voltage (k T / q) Zener diode breakdown V – too high breakdown V Self-biasing requires a start-up circuit Self-biasing requires a start-up circuit – Must force circuit into equilibrium in desired stable state

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Analog and Low-Power Design Lecture 20 (c) 20034 V t Referenced Self-Biased Circuit Fig 12.25a (old book) Fig 12.25a (old book)

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Analog and Low-Power Design Lecture 20 (c) 20035 Analysis Feedback from M 2, M 3 & M 4 forces same current I to flow in M 1 and R Feedback from M 2, M 3 & M 4 forces same current I to flow in M 1 and R Operating point must satisfy: Operating point must satisfy: I R = V GS1 = V t1 + 2 I I R = V GS1 = V t1 + 2 I n C ox (W / L) 1 n C ox (W / L) 1 Neglect channel length modulation & body effect Neglect channel length modulation & body effect Make 2 nd term small compared to V t Make 2 nd term small compared to V t 1.Use low bias current 2.Use large W/L I V t / R I V t / R

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Analog and Low-Power Design Lecture 20 (c) 20036 Analysis (continued) If 2 nd term included, O/P current is slightly reduced but T and V DD dependence is the same If 2 nd term included, O/P current is slightly reduced but T and V DD dependence is the same Must ensure stability – need to verify that feedback loop gain is < 1 at operating point Must ensure stability – need to verify that feedback loop gain is < 1 at operating point – Do by breaking the loop, injecting a signal, & checking the gain Must determine degree of supply independence Must determine degree of supply independence – Channel length modulation in M 2 & M 1 causes bias current variation Reduce variation with cascode current source Reduce variation with cascode current source

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Analog and Low-Power Design Lecture 20 (c) 20037 Problem In typical MOS process, V t not well controlled In typical MOS process, V t not well controlled 0.5 V V t 0.8 V V tn has TC ( temperature coefficient ) of –2 mV / o C, but diffused R’s have a large positive TC V tn has TC ( temperature coefficient ) of –2 mV / o C, but diffused R’s have a large positive TC Results in O/P current with large negative TC Results in O/P current with large negative TC

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Analog and Low-Power Design Lecture 20 (c) 20038 Delta V t Temperature Independence Use differences in V t of two devices of same polarity but with different channel implants Use differences in V t of two devices of same polarity but with different channel implants Advantage: TC’s of two devices cancel to first order Advantage: TC’s of two devices cancel to first order – Can get O/P Voltage TC as low as 20 ppm / o C

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Analog and Low-Power Design Lecture 20 (c) 20039 V T Referenced Biasing Fig 12.25b (old book) Fig 12.25b (old book)

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Analog and Low-Power Design Lecture 20 (c) 200310 Disadvantages Large initial tolerance in O/P voltage value Large initial tolerance in O/P voltage value – Threshold voltages have large tolerance Extensively used for precision voltage references in n MOS and CMOS Extensively used for precision voltage references in n MOS and CMOS – Need to trim a resistor to adjust absolute O/P voltage

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Analog and Low-Power Design Lecture 20 (c) 200311 V BE Referenced Biasing Fig 12.26 (old book) Fig 12.26 (old book)

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Analog and Low-Power Design Lecture 20 (c) 200312 Analysis pnp is a parasitic bipolar device in p -substrate CMOS pnp is a parasitic bipolar device in p -substrate CMOS Can also use a parasitic npn transistor Can also use a parasitic npn transistor Feedback involving M 1, M 2, M 3, M 4 forces emitter current in Q 1 to match R current Feedback involving M 1, M 2, M 3, M 4 forces emitter current in Q 1 to match R current I R = V T ln I or I = V BE1 I R = V T ln I or I = V BE1 I S R I S R Advantage: V BE is well-controlled, with 5% variation Advantage: V BE is well-controlled, with 5% variation Disadvantage: V BE has a negative TC of –2 mV / o C Disadvantage: V BE has a negative TC of –2 mV / o C – R has a strong positive TC – Leads to a strong negative TC in bias current – Can reduce reference current variation with a cascode or Wilson current source

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Analog and Low-Power Design Lecture 20 (c) 200313 V T -Referenced Biasing (Thermal Voltage) Fig 12.27 (old book) Fig 12.27 (old book)

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Analog and Low-Power Design Lecture 20 (c) 200314 Analysis Q 1 & Q 2 transistor areas differ by n factor Q 1 & Q 2 transistor areas differ by n factor Feedback circuit makes them operate at same bias current Feedback circuit makes them operate at same bias current Difference between two V BE ’s appears across resistor R V BE = V T ln I I S I = I S e Get: I R = V BE1 – V BE2 Get: I R = V BE1 – V BE2 = V T ln I - V T ln I = V T ln I - V T ln I I S n I S I S n I S = V T ln I n I S = V T ln I n I S I S I I S I Or I = V T ln (n) Or I = V T ln (n) R V BE / V T ) ( ] [ ) ( ) ( ) (

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Analog and Low-Power Design Lecture 20 (c) 200315 Discussion Advantage: V T has positive temperature coefficient (V T = kT / q) Advantage: V T has positive temperature coefficient (V T = kT / q) R has a positive TC, so current output is relatively T independent R has a positive TC, so current output is relatively T independent

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Analog and Low-Power Design Lecture 20 (c) 200316 V T Referenced Self-Biased Reference Circuit With cascoded devices: With cascoded devices: – Improves power-supply rejection and initial accuracy V across R is ~ 100 mV V across R is ~ 100 mV Small differences in V GS for M 1 & M 2 cause large O/P current (I OUT ) changes Small differences in V GS for M 1 & M 2 cause large O/P current (I OUT ) changes – Result from device mismatches or from channel length modulation in M 1 & M 2 (with different drain voltages)

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Analog and Low-Power Design Lecture 20 (c) 200317 Self-Biased Reference Circuit Fig 12.28 (old book) Fig 12.28 (old book)

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Analog and Low-Power Design Lecture 20 (c) 200318 Band-Gap Referenced Biasing Fig 12.29 (old book) Fig 12.29 (old book)

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Analog and Low-Power Design Lecture 20 (c) 200319 Analysis I M8 drain = V T ln (n) I M8 drain = V T ln (n) R V 0 = V BE + V T ln (n) x R V 0 = V BE + V T ln (n) x R R = V BE + x V T ln (n) = V BE + x V T ln (n) OPAMP maintains V 0 at both + and – terminals due to feedback OPAMP maintains V 0 at both + and – terminals due to feedback I OUT = V 0 / R 2 I OUT = V 0 / R 2 Advantage: By weighting V BE and V T components, one gets a voltage of any desired TC Advantage: By weighting V BE and V T components, one gets a voltage of any desired TC – Can exactly cancel an R TC ) (

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Analog and Low-Power Design Lecture 20 (c) 200320 Weighting Parameter x determines weighting of V T -dependent portion: Parameter x determines weighting of V T -dependent portion: 1.Can use only common collector transistors 2.OPAMP has MOS transistors, so their input offset voltage and input offset voltage temperature drift influence O/P voltage of the reference Must remove offset with analog storage and cancellation Must remove offset with analog storage and cancellation

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Analog and Low-Power Design Lecture 20 (c) 200321 Summary Temperature and supply-independent biasing Temperature and supply-independent biasing OPAMP design OPAMP design

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