Presentation is loading. Please wait.

Presentation is loading. Please wait.

Institut für Angewandte Mikroelektronik und Datentechnik Course and contest Results of Phase Selected Topics in VLSI Design (Module 24513) 03.04.2015 ©

Similar presentations


Presentation on theme: "Institut für Angewandte Mikroelektronik und Datentechnik Course and contest Results of Phase Selected Topics in VLSI Design (Module 24513) 03.04.2015 ©"— Presentation transcript:

1 Institut für Angewandte Mikroelektronik und Datentechnik Course and contest Results of Phase Selected Topics in VLSI Design (Module 24513) © 2013 UNIVERSITÄT ROSTOCK | Fakultät für Informatik und Elektrotechnik1

2 Institut für Angewandte Mikroelektronik und Datentechnik Institut für Angewandte Mikroelektronik und Datentechnik DO NOT-List Motivation Why VLSI-project? What is the aim?  NOT important to other listeners as fundamental info on the project is familiar to everyone and should not be repeated Tool issues, delays due to private appointments  NOT important either To make it clear: Such a slide is to be omitted © 2013 UNIVERSITÄT ROSTOCK | Fakultät für Informatik und Elektrotechnik

3 Institut für Angewandte Mikroelektronik und Datentechnik Institut für Angewandte Mikroelektronik und Datentechnik Facts to present Design and architecture: Figures to be given to describe your transformation design: Chosen adders, multipliers Algorithmic/architectural/component enhancements Optimizations (explain WHY they were chosen) What did you expect? What does theory promise? © 2013 UNIVERSITÄT ROSTOCK | Fakultät für Informatik und Elektrotechnik

4 Institut für Angewandte Mikroelektronik und Datentechnik Institut für Angewandte Mikroelektronik und Datentechnik Facts to present Figures to be given (with consistent units): Frequency Area Power Pipeline depth (# of register stages -1) Further facts you consider important (e.g. # of logic blocks, registers …) © 2013 UNIVERSITÄT ROSTOCK | Fakultät für Informatik und Elektrotechnik Mandatory values for FPGA and ASIC Frequency f63,23 MHz Area A* µm² Power P dyn 8,70 mW Power P stat 2,71 µW # pipeline stages1 Metric[x] * for FPGA: # of LUT-FF pairs

5 Institut für Angewandte Mikroelektronik und Datentechnik Institut für Angewandte Mikroelektronik und Datentechnik Flow for the presentation Recommended flow for reasoning: 1.Observations: What do/did you observe in your design? –Problems, drawbacks, potential enhancements … 2.Do your observations leave room for optimizations? –What do you expect to change? –What does theory promise? 3.Present and discuss results of the implemented optimizations –Conclude based on your results (e.g. approach was reasonable, unsuccessful) 4.Outlook on next steps/optimizations –Is there room for further optimization? Why? What do you plan to do? © 2013 UNIVERSITÄT ROSTOCK | Fakultät für Informatik und Elektrotechnik

6 Institut für Angewandte Mikroelektronik und Datentechnik Thanks for your attention! © 2013 UNIVERSITÄT ROSTOCK | Fakultät für Informatik und Elektrotechnik6


Download ppt "Institut für Angewandte Mikroelektronik und Datentechnik Course and contest Results of Phase Selected Topics in VLSI Design (Module 24513) 03.04.2015 ©"

Similar presentations


Ads by Google