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Princess Sumaya Univ. Computer Engineering Dept. د. بســام كحـالــه Dr. Bassam Kahhaleh.

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Presentation on theme: "Princess Sumaya Univ. Computer Engineering Dept. د. بســام كحـالــه Dr. Bassam Kahhaleh."— Presentation transcript:

1 Princess Sumaya Univ. Computer Engineering Dept. د. بســام كحـالــه Dr. Bassam Kahhaleh

2 Princess Sumaya Univ. Computer Engineering Dept. Chapter 2:

3 Princess Sumaya University 22343 – Computer Organization & Design Computer Engineering Dept. Basic Computer Organization  The 5 Classic Components of a Computer  The Basic Hardware/Software Interface  The Stored-Program Concept 2 / 19 11:44 AM

4 Princess Sumaya University 22343 – Computer Organization & Design Computer Engineering Dept. Instructions  Assembly Language Instruction: Perform:a = b + c ADDa, b, c; a  b + c What are ‘a’, ‘b’ and ‘c’? ●The storage concept: ♦ Registers (R1, R2 …) ♦ Memory  Sequence of Instructions: Perform: a = (b + c) – (d + e) 3 / 19 11:44 AM

5 Princess Sumaya University 22343 – Computer Organization & Design Computer Engineering Dept. Instructions  Design Principle 1: Simplicity Favors Regularity ●Fixed number of operands ●Arithmetic operations on registers only  Design Principle 2: Smaller is Faster Small number of registers  faster hardware ●Fill registers with data ●Not enough registers to hold all data Simpler hardware 4 / 19 11:44 AM

6 Princess Sumaya University 22343 – Computer Organization & Design Computer Engineering Dept. Memory Operands  Data Transfer Instructions ●Memory Address (Location) ●Slower than registers ●Lower bandwidth than registers ●Keep commonly used data in registers and avoid Spilling Registers.  Load and Store Instructions 0 1 2 Memory 5 / 19 11:44 AM

7 Princess Sumaya University 22343 – Computer Organization & Design Computer Engineering Dept. Operands  Design Principle 3: Make the Common Case Fast ●Constant operands: Perform a = b + 4 ●Immediate operands Memory b 4 21 22 6 / 19 11:44 AM

8 Princess Sumaya University 22343 – Computer Organization & Design Computer Engineering Dept. Memory Access  Height and Width 1 KB 4 KB  Address & Data 16 Locations  1 K Locations  1 M Locations   Read & Write Memory 4301 0001 21 22 1024 8 bit 1 KB 7 / 19 11:44 AM

9 Princess Sumaya University 22343 – Computer Organization & Design Computer Engineering Dept. Stored Program Architecture Instructions (Program) Operands (Data) Memory 1024 x 32 OpcodeOperands Binary Operand 8 / 19 11:44 AM

10 Princess Sumaya University 22343 – Computer Organization & Design Computer Engineering Dept. Memory Organization  Byte Access  Word Access 20 Byte 21 Byte 20 Byte Byte Byte Byte 24 Byte Byte Byte Byte 9 / 19 11:44 AM 20 Byte Byte 22 Byte Byte

11 Princess Sumaya University 22343 – Computer Organization & Design Computer Engineering Dept. Memory Organization  Mixed Access ●Little Indian ●Odd/Even Alignment 20 Byte Byte 22 Byte Byte 10 / 19 11:44 AM DATABUS MSB LSB

12 Princess Sumaya University 22343 – Computer Organization & Design Computer Engineering Dept. Memory Organization  Mixed Access ●Alignment! 20 Byte Byte Byte Byte 24 Byte Byte Byte Byte 11 / 19 11:44 AM DATABUS MSB LSB

13 Princess Sumaya University 22343 – Computer Organization & Design Computer Engineering Dept. Instruction Representation  Instruction Format  Machine Language & Machine Code Sequence of instructions  Design Principle 4: Good Design Demands Good Compromises OpcodeOperands ADD R1, R2, 47 5 1 2 2F 01010001001000101111 5 1 2 2 F Assembly Language Machine Language 12 / 19 11:44 AM

14 Princess Sumaya University 22343 – Computer Organization & Design Computer Engineering Dept. Operations (Opcodes)  Arithmetic ●Add, Sub, Mul, Div, Inc, Dec …  Logic ●Shift ♦ Logical & Arithmetic ♦ Right & Left ●Bitwise AND, OR, XOR ●Complement (NOT) 1 0 1 0 0 1 1 1 13 / 19 11:44 AM

15 Princess Sumaya University 22343 – Computer Organization & Design Computer Engineering Dept. Operations (Opcodes)  Shift Operation for Multiplication ●Multiply by 2 ♦ Shift Left 1 bit ♦ Unsigned Binary ♦ 2’s Complement ●Multiply by 10 ♦ BCD ♦ Shift Left 4 bits 0 0 0 0 0 1 0 0 1 1 1 1 1 1 0 1 0 0 0 0 0 1 0 0 1 0 0 1 14 / 19 11:44 AM

16 Princess Sumaya University 22343 – Computer Organization & Design Computer Engineering Dept. Control Instructions  Making Decisions (Conditional Branches) Perform if (i == j) then a = b + c else a = b – c i == j ? a = b + ca = b – c 15 / 19 11:44 AM

17 Princess Sumaya University 22343 – Computer Organization & Design Computer Engineering Dept. Control Instructions  Transferring Execution ●Unconditional Branch or Jump ●Call Subroutine ●Software Interrupt 16 / 19 11:44 AM

18 Princess Sumaya University 22343 – Computer Organization & Design Computer Engineering Dept. Intel Architecture IA-32 YearMicroprocessorAddress BitsData BitsTransistors 197140041242,300 197480801686,000 197880862016/829,000 1982802862416/8134,000 1985803863232/16/8275,000 1989804863232/16/81,200,000 1992Pentium3232/16/83,100,000 1995Pentium Pro3232/16/85,500,000 1997Pentium II3232/16/87,500,000 1999Pentium III3232/16/89,500,000 2001Pentium 43232/16/842,000,000 2004Pentium 4 EM64T6432/16/8125,000,000 2008Core 2 Quad6432/16/8820,000,000 17 / 19 11:44 AM

19 Princess Sumaya University 22343 – Computer Organization & Design Computer Engineering Dept. EAX Intel Architecture IA-32  General-Purpose Registers (GPRs)  Segment Registers Segmented Memory Addressing (Real Mode) ALAX EAX AXAL EBX BXBL ECX CXCL EDX DXDL ESISI EDIDI “Base” “Count” CS SS DS “Division” “String Source” “String Destination” Also: “Accumulator” 18 / 19 11:44 AM

20 Princess Sumaya University 22343 – Computer Organization & Design Computer Engineering Dept. Intel Architecture IA-32  Variable Length Instruction Format 19 / 19 11:44 AM

21 Princess Sumaya University 22343 – Computer Organization & Design Computer Engineering Dept. Chapter 2


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