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CENG 241 Digital Design 1 Lecture 2 Amirali Baniasadi

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1 CENG 241 Digital Design 1 Lecture 2 Amirali Baniasadi

2 2 This Lecture zReview of last lecture zBoolean Algebra

3 3 Boolean Function: Example zTruth table zx y z F1 F2 z z z z z z z z A Boolean Function can be represented in only one truth table forms

4 4 Canonical & Standard Forms zConsider two binary variables x, y and the AND operation zfour combinations are possible: x.y, x’.y, x.y’, x’.y’ zeach AND term is called a minterm or standard products zfor n variables we have 2 n minterms zConsider two binary variables x, y and the OR operation zfour combinations are possible: x+y, x’+y, x+y’, x’+y’ zeach OR term is called a maxterm or standard sums zfor n variables we have 2 n maxterms

5 5 Minterms zx y z Terms Designation z x’.y’.z’ m0 z x’.y’.z m1 z x’.y.z’ m2 z x’.y.z m3 z x.y’.z’ m4 z x.y’.z m5 z x.y.z’ m6 z x.y.z m7

6 6 Maxterms zx y z Designation Terms z M0 x+y+z z M1 x+y+z’ z M2 x+y’+z z M3 x+y’+z’ z M4 x’+y+z z M5 x’+y+z’ z M6 x’+y’+z z M7 x’+y’+z’

7 7 Boolean Function: Exampl How to express algebraically z1.Form a minterm for each combination forming a 1 z2.OR all of those terms zTruth table example: zx y z F1 minterm z z x’.y’.z m1 z z z x.y’.z’ m4 z z z x.y.z m7 zF1=m1+m4+m7=x’.y’.z+x.y’.z’+x.y.z=Σ(1,4,7)

8 8 Boolean Function: Exampl How to express algebraically z1.Form a maxterm for each combination forming a 0 z2.AND all of those terms zTruth table example: zx y z F1 maxterm z x+y+z M0 z z x+y’+z M2 z x+y’+z’ M3 z z x’+y+z’ M5 z x’+y’+z M6 z zF1=M0.M2.M3.M5.M6 = л(0,2,3,5,6)

9 9 Implementations Three-level implementation vs. two-level implementation Two-level implementation normally preferred due to delay importance.

10 10 Digital Logic Gates

11 11  All gates -except for the inverter and buffer- can be extended to have more than two inputs zA gate can be extended to multiple inputs if the operation represented is commutative & associative zx+y=y+x z(x+y)+z=x+(y+z) Extension to Multiple Inputs

12 12 Extension to Multiple Inputs We define multiple input NAND and NOR as:

13 13 Extension to Multiple Inputs What about multiple input XOR? ODD function: 1 if the number of 1’s in the input is odd

14 14 Positive and Negative Logic Two values of binary signals

15 15 Integrated Circuits (ICs) zLevels of Integration zSSI: fewer than 10 gates on chip zMSI:10 to 1000 gates on chip zLSI: thousands of gates on chip zVLSI:Millions of gates on chip z Digital Logic Families zTTL transistor-transistor logic zECL emitter-coupled logic zMOS metal-oxide semiconductor zCMOS complementary metal-oxide semiconductor

16 16 Digital Logic Parameters zFan-out: maximum number of output signals zFan-in : number of inputs zPower dissipation zPropagation delay zNoise margin: maximum noise

17 17 CAD- Computer-Aided Design zHow do they design VLSI circuits???? zBy CAD tools zMany options for physical realization: FPGA, ASIC… zHardware Description Language (HDL): zRepresents logic design in textual format zResembles a programming language

18 18 Gate-Level Minimization zThe Map Method: zA simple method for minimizing Boolean functions zMap: diagram made up of squares zEach square represents a minterm

19 19 Two-Variable Map

20 20 Two-Variable Map Maps representing x.y and x+y

21 21 Three-Variable Map

22 22 Three-Variable Map-example 1

23 23 Summary zExtension to multiple inputs zPositive & Negative Logic zIntegrated Circuits zGate Level Minimization


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