Presentation on theme: "1 2 nd AMICSA Workshop – 1 & 2 September 2008 Linearity Performances Measurement of a Low Power 14-bit A / D Converter, tested in Representative Conditions."— Presentation transcript:
1 2 nd AMICSA Workshop – 1 & 2 September 2008 Linearity Performances Measurement of a Low Power 14-bit A / D Converter, tested in Representative Conditions of CCD Space Applications J.Y Seyler, F. Malou, A. Penquer – CNES France L. Dugoujon, C. Prugne - STMicroelectronics
2 2 nd AMICSA Workshop – 1 & 2 September 2008 Presentation Plan : Introduction The TSA1401 ADC & RHF1401 ( Hi Rel version ) Generalities Motivation Aspects Hi Rel Version Accuracy of the Linearity Measurements Method Measurements Method Bench Description Measurement Accuracy Measurement Results Conclusions & Perspective
3 2 nd AMICSA Workshop – 1 & 2 September 2008 Introduction : Particular Constraints of the Video Signal for ADC : –Perturbations during the conversion ( Reset Peak for CCD ) –Very different amplitudes for 2 consecutive samples ( obscurity followed by highly illuminated pixels ) –Linearity Performance of the A/D Converters = Major issue for space missions –Environment Hardness, Low Power Consumption –…–… The “ COTS ” ( “ Components Off The Shelve ” ) ADC announce today : –High performances, –Low Power consumption. Our purpose : –Consider directly A/D converters available “ Off the Shelve ” –Evaluate these devices in test conditions representatives of CCD applications. –An additional space qualification work is to be paid for environment hardness insurance.
4 2 nd AMICSA Workshop – 1 & 2 September 2008 TSA1401 ADC and the HIREL one (1/3) : Generalities about the TSA1401 : 14-bit, up to 30Msps sampling frequency ADC developed by STMicroelectronics using deep submicron CMOS technology combining high performances with very low power consumption. Pipeline structure with digital error correction Excellent static linearity and dynamic performances. Dissipates 85 20Msps ( down to 10 Msps ). = 5 times less power consuming than usual space ADC.
5 2 nd AMICSA Workshop – 1 & 2 September 2008 TSA1401 ADC and the HIREL one (2/3) : Motivation Aspects and reason for characterizing the TSA1401 : –Lowest known power consumption ( similar Speed & Resolution ADCs ) –Linearity performances announcement = very good : I.N.L. p/p <= 4 LSB DNL p/p <= 1.2 LSB. –SEL immune up to LET de 55 MeV/mg.cm² ( CNES tests ) –Also available in Space Grade from STM : “ RHF1401” with Space Evaluation : ESCC specifications ( with CNES funding ), QML-V Certification for US Qualification in progress. Nota : Results presented are from commercial grade version.
6 2 nd AMICSA Workshop – 1 & 2 September 2008 RHF bit ADC (1/2) : Wide sampling range : 1.5Msps to 30Msps 20Msps Input range : 2Vpp differential 90dB Fs = 20Msps, Fin = 5MHz 2.5V / 3.3V compatible digital I/O Internal / External V-ref Rad-hard : 300 kRad(Si) TID Failure immune ( SEFI ) and Latchup immune ( SEL ) up to 120 MeV-cm²/mg at 2.7V and 125°C QML-V, smd bit ADC Hermetic SO-14
7 2 nd AMICSA Workshop – 1 & 2 September 2008 RHF bit ADC (2/2) : Hirel Version, RHF1401 : Proposed in a Ceramic SO-48 package. Complete Evaluation Test program is carried out to demonstrate the high reliability of this ADC for Space Applications : Including mechanical and thermal tests, endurance tests and a Construction Analysis. Radiation Tests under Heavy Ions ( susceptibility to Single Event Effects ) and under Co60 dose Rad-Hard product up to 300 kRad ( Si ). First Radiation Tests : no Single Event Latch-up under heavy ions and no parameter deviations up to 1 MRad ( Si ) Total Dose. Hi-Rel version of the ADC will be fully qualified before end 2008 : –Electrical Characterization –Screening + Life-Test 3000 h –Construction Analysis made at CNES –TID Tests : OK up to 150krads –Intended to be introduced into EPPL
8 2 nd AMICSA Workshop – 1 & 2 September 2008 Accuracy of the linearity measurements method : Measurements Method Bench Description Measurement Accuracy
9 2 nd AMICSA Workshop – 1 & 2 September 2008 Linearity Measurement Method : Histogram generated with “ Analogue Stimulus Generator ” : 16-bit resolution Analogue Voltage to the ADC. Ramp Function excitation ( sweeps full-scale range a given number of times with the same occurrence probability at each voltage step ) Because : “ Traditional Sine wave excitation” is too far from real CCD signal. D.N.L. and I.N.L. can be extracted from the sampled histogram, if we note : (1) (2) (3)
10 2 nd AMICSA Workshop – 1 & 2 September 2008 Analogue Signal Generated : Figure 1 : “ Quasi-Static ” Test Mode Figure 2 : “ Perturbated ” Test Mode Figure 3 : “ Alternated ” Test Mode Generation of 3 types of signals : “ Quasi-Static ” Test Mode ( Light Intensity linear variations ) : –The signal is a ramp function –Each step of the ramp is sampled. “ Perturbated ” Test Mode : –The signal is a ramp function with periodic perturbation levels. –Perturbation levels are not sampled. “ Alternated ” Test Mode ( Consecutive sampling of a Dark pixel and Illuminated pixel) : –Ramp function with periodic perturbation levels. –Perturbation levels are sampled.
11 2 nd AMICSA Workshop – 1 & 2 September 2008 Bench Description : The Test Bench, in CNES, is composed of 4 parts : Analog Stimulus Generator ( Analog Card with FPGA, 16-bit D/A Converter, Differential Amplifier, … ) “ A/D Under Test ” mounted on a dedicated card. Power Supplies, Clock Generator to drive the ASG and the A/D Card Dedicated Software ( Clock Generators, Data Acquisition from A/D ) A/D card Stimulus Generator
12 2 nd AMICSA Workshop – 1 & 2 September 2008 Measurement Accuracy : DNL Measurement Accuracy can be computed knowing : ADC DNL ( ASG is supposed to have ideal linearity ), Number of ramps, ADC bit-resolution, Total analog noise ( ASG + ADC noises ) 2 forms of measurement error : Systematic error ( because ASG has only discrete values ) Random error ( = Standard Deviation ) Systematic Error versus Noise : Measured with 0.05 LSB simulated ADC DNL. Total analog noise is measured to be 2.5 LSB_rms Systematic error totally canceled ! DNL Random Error : ADC with theoretical null NLD on all codes obtained by simulation for different ramp numbers
14 2 nd AMICSA Workshop – 1 & 2 September 2008 Measurement Results (1/2) : 1°) TSA1401 : excellent Linearity Performances ( Quasi-Static 10 Msps ) : Test Mode Sampling Frequency Peak-to-Peak DNL Peak-to-Peak INL Quasi-Static1.25 Msps0.3 LSB3.5 LSB Quasi-Static10 Msps0.5 LSB4.1 LSB Perturbated10 Msps0.7 LSB5.3 LSB Alternated10 Msps1.3 LSB11 LSB 2°) TSA1401 Measurements : Very good results in other Test Modes Decline observed in the case of Alternated 10Msps … DNL INL
15 2 nd AMICSA Workshop – 1 & 2 September 2008 Measurement Results (2/2) : In “ Alternated 10Msps ” : INL = 11 LSB p/p -> 2 x higher But still compatible with the most space missions required performances Linearity Performances 10Msps : Perturbated Alternated Mode.
16 2 nd AMICSA Workshop – 1 & 2 September 2008 Conclusions and Perspective : –…
17 2 nd AMICSA Workshop – 1 & 2 September 2008 Conclusions and Perspective : CNES Test Bench allows measurements of Linearity Performances of 14-bit resolution ADC with a very good accuracy. Measured in representative conditions of CCD applications. Preliminary Linearity measurements on TSA1401 High Level Performances. More devices have to be tested to confirm these results : RHF1401 to be several Temp. & Vdd conditions since few differences with TSA1401 ( # Package ). The TSA1401 is confirmed to provide a valuable candidate as a 14-Bit 20Msps A/D Converter for demanding CCD space applications : Very Low Power Consumption, Excellent Linearity performance in Space CCD Application Conditions. RHF1401 Hi-Rel version expected to provide similar excellence with full ESCC ( CNES funding) and QML-V space qualification before end 2008.
18 2 nd AMICSA Workshop – 1 & 2 September 2008 Thanks for your Attention … … and The Restaurant