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Prof. Yoram Ofek - DIT - University di Trento1 IP FLows over Optical and Wireless IP FLows over Optical and Wireless “IP-FLOW” UTC-based / Banyan-based.

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Presentation on theme: "Prof. Yoram Ofek - DIT - University di Trento1 IP FLows over Optical and Wireless IP FLows over Optical and Wireless “IP-FLOW” UTC-based / Banyan-based."— Presentation transcript:

1 prof. Yoram Ofek - DIT - University di Trento1 IP FLows over Optical and Wireless IP FLows over Optical and Wireless “IP-FLOW” UTC-based / Banyan-based Switch and Wi-Fi Prototype This work was supported in part by funds from the European Commission (contract N° ) Marie Curie Chairs (EXC)

2 prof. Yoram Ofek - DIT - University di Trento2 Participants  Mario Baldi – Politecnico di Torino  (Michele Corra – Universita' di Trento)  Giorgio Fontana – Universita' di Trento  Renato LoCigno – Universita' di Trento  Yoram Ofek – Universita' di Trento  Danilo Severina – Universita' di Trento  Prof. Giovanni Soncini – Universita' di Trento  (Deepak Agrawal – Universita' di Trento)  Paolo Larcheri – Universita' di Trento  Truong Thu Huong – Universita' di Trento  Guido Marchetto – Politecnico di Torino  Viet-Thang Nguyen – Universita' di Trento  Olga Zadedyurina – Universita' di Trento

3 prof. Yoram Ofek - DIT - University di Trento3 Agenda  Project overview and prototype-testbed objectives – Yoram Ofek – Universita' di Trento  Terabit switch prototype – Giorgio Fontana – Universita' di Trento  Terabit switch control plan and signaling – Michele Corra, Viet-Thang Nguyen – Universita' di Trento  Torino software-based time-driven priority switch – Guido Marchetto, Mario Baldi - Politecnico di Torino  Using Symmetricom GPS time card – Guido Marchetto – Politecnico di Torino  GE to terabit switch interface – Truong Thu Huong – Universita' di Trento  Terabit switch to wireless interface – Paolo Larcheri – Universita' di Trento

4 prof. Yoram Ofek - DIT - University di Trento4 General Guidelines  General prototype meeting at least every 3-month  Credit for all principle  Prototype activities is only part of a more general research activities  Objective:  To have some prototype demonstration by July, then  To use the prototype to obtain more funding to expand:  To connect Trento and Torino  To develop and implement optoelectronic switching fabric  To develop and implement GMPLS control plane  Other activities: web page, papers, seminars, …

5 prof. Yoram Ofek - DIT - University di Trento5 Prototype Functional Structure SwitchingFabricPrototype UTC-based Switch Controller UTC-basedNetworkInterface Wi-Fiw/SmartAntenna (1) (2) (3) (4) UTC-basedNetworkInterface Wi-Fiw/SmartAntenna (3) (4) UTC UTC UTC Optional extensions: (5) Satellite interface (6) Ethernet Passive Optical Network - EPON (5) (6) EPON GEGE

6 prof. Yoram Ofek - DIT - University di Trento6 Prototype Activity Chart Switching Fabric Prototype: Giorgio, Olga UTC-based Switch Controller: Giorgio, Nguyen, (Deepak, Michele) UTC-based Network Interface: Danilo, Guido, Paolo, Truong Wi-Fi w/Smart Antenna: Danilo, Paolo (1) (2) (3) (4) UTC UTC GE: Giorgio, Olga Main Demonstration: Streaming of Audio and Video Flows through Wireless and Optical = IP-FLOW between Trento and Torino SW Responsible Person Danilo HW Responsible Person Giorgio 12 Project – WL QoS Torino NetGroup Time-drive Priority

7 prof. Yoram Ofek - DIT - University di Trento7 Action Plan  Implementation: February-May 2005  (1)  (1) Hardware implementation and testing (Giorgio, Olga)  Software implementation primarily the scheduling operations, s.t., at predefined times in each UTC second – while gradually changing time scales – from milliseconds to microseconds:  (2)  (2) To change the cross-point by the switch controller (Nguyen, Deepak)  (3)  (3) To send data to the switch (Truong, Guido) To send data to Wi-Fi (Paolo, Danilo)  (4)  (4) Wi-Fi with directional antennas (Paolo, Danilo)  Integration and testing: May-July 2005

8 prof. Yoram Ofek - DIT - University di Trento8 (1) Switching Fabric Prototype MindSpeed M by Gbps x128: 10 Tbps Switching Module Electrical Interconnection MindSpeed M by Gbps 128-by Gbps 128-by Gbps

9 prof. Yoram Ofek - DIT - University di Trento9 STEP 1: BASIC ELECTRONIC ANALOG & DIGITAL TESTING Electrical Interconnection Pattern Generator Error Detector Oscilloscope Laptop computer Direct electrical Coupling of GE? Direct electrical Coupling of GE? Spectrum Analyzer (1) Switching Fabric Prototype

10 prof. Yoram Ofek - DIT - University di Trento10 TWO NODES with Alignment GPS/Galileo Time Source GPS/Galileo Time Source Pipeline Forwarding Switch Controller UTC Pipeline Forwarding Switch Controller UTC Laptop computer UTC Remote Packet Data Source (Torino Design) Remote Packet Data Source (Torino Design) UTC TF Alignment UTC SIGNALING VIA THE NETWORK UTC TF Alignment UTC TF Alignment UTC TF Alignment Electrical Interconnection TF – Time Frame (1) Switching Fabric Prototype

11 prof. Yoram Ofek - DIT - University di Trento11 (1) UTC Based Switching Test Bed Glue logic Glue logic Low speed control channel public Internet. USB2 High speed data channels BERT 3.2 Gb GPS time/frequency source. GPS time/frequency source. Parallel interface Parallel interface rs232 Pack and Unpack data with UTC. Mindspeed demo board

12 prof. Yoram Ofek - DIT - University di Trento12 Glue logic Glue logic Low speed control channel public Internet. USB2 High speed data channels Parallel interface Parallel interface rs232 Pack and Unpack data with UTC. Mindspeed demo board 2 x gigabit ethernet 4 x GBIC

13 prof. Yoram Ofek - DIT - University di Trento13 Input 1 Alignment Switching Fabric Alignment Input N Output 1 Output N t+1 Time-of-Day or UTC t-1t-2 t-3 t t+2 Idle time: Safety margin between two time frames Time-of-Day or UTC : Time frame payload – with a predefined number of data units : Time frame Pipeline Forwarding Switch Controller (1) Switching Fabric Prototype – Alignment

14 prof. Yoram Ofek - DIT - University di Trento14 UTC Alignment Queues 1-to-3 DMUX Queue 1 Switch Controller Select-in Queue 2 Queue 3 3-to-1 DMUX Switch Controller Select-out { To Fabric Input signal UTC alignment principle: At every time frame, - packets from the receiver are stored in one queue and - packets to the fabric are transferred from another queue Thus, memory access BW = optical link BW UTC alignment problem: The link delay is not integer multiple of time frames Output signal (1) Switching Fabric Prototype – Alignment

15 prof. Yoram Ofek - DIT - University di Trento15 (1) Switching Fabric Prototype – testing plan  Testing step 1: Static testing of the cross-point switches  Testing step 2: Optoelectronic transceiver to cross-point  Testing step 3: Bit synchronization testing  Testing step 4: GE to GE packet transmission  Key issues:  Bit synchronization  UTC synchronization software latency Discussion Notes: The synchro between two card can be done with internal generator or with GPS clock and PGA logic card Synchro between two card: it is more important that the two card has the same frequency than to know exactly what the frequency of them is MindSpeed works until 3Gb/s, but at this speed the distortion generates jitter. It can be reduced by PLL. With PLL a continuous flow of packets is needed to avoid silence that can cause loss of synchro. One flow in input can manage more than one flows in output.

16 prof. Yoram Ofek - DIT - University di Trento16 (2) UTC-based Switch Controller  Down-load next switching configuration  UTC synchronization software latency  Which controller should be used? PC-based, ?  Using FPGA card with USB interface – up to 200 MHz  How to connect single controller to 4 cross-point switches SwitchingFabricPrototype UTC-based Switch Controller (1) (2) UTC

17 prof. Yoram Ofek - DIT - University di Trento17 (2) UTC-based Switch Controller Discussion Notes: To use an external card with FPGA on board. The card can be connected to the Mindspeed Board with bus and must be connected to a PC through COM or USB connection. The controller must contain: FPGA USB controller or COM port Programmable PLL to change the clock of FPGA The configuration of controller can be done with VHDL The LabView software can be user for these purpose, but it is only an user-interface. The speed of FPGA must manage the Mux (1to3) and DeMux(3to1)

18 prof. Yoram Ofek - DIT - University di Trento18 (3) UTC-based Network Interface  Which operating system should be used?  FreeBSD or Linux  UTC to transmission response time – UTC to GE card? SwitchingFabricPrototype UTC-basedNetworkInterface (1) (3) UTC-basedNetworkInterface (3) UTCUTC

19 prof. Yoram Ofek - DIT - University di Trento19 (3) UTC-based Network Interface Discussion Notes: The card for syncrho receive a clock from GPS and generate a pulse timing in the output with frequency that can be changed Developed software is online. Each Pc must have an UTC card for the synchro If a server has two processor, the OS allows to manage them separately? Software FREEBSD: the system must manage the queue and programs to queues are written for this OS. There is not export for Linux? FreeBSD can be more flexible, but it may be more difficult to manage.

20 prof. Yoram Ofek - DIT - University di Trento20 (4) Wireless to Optical Interface  Bandwidth mismatch scheduling  Clock distribution to Wi-Fi clients – mobile devices  …  Access point from ST Microelectronics SwitchingFabricPrototype UTC-basedNetworkInterface Wi-Fiw/SmartAntenna (1) (3) (4) UTC-basedNetworkInterface Wi-Fiw/SmartAntenna (3) (4) UTCUTC

21 prof. Yoram Ofek - DIT - University di Trento21 (4) Wireless to Optical Interface Discussion Notes: The flows that arrive to wireless network is synchro The AP of the wireless LAN can be synchronized among them The policy to allow user to access to the network can be partially centralized. Synchro among users is very difficult.


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