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Copyright © 2001, Daniel W. Lewis. All Rights Reserved. CHAPTER 11 SYSTEM INITIALIZATION
Copyright © 2001, Daniel W. Lewis. All Rights Reserved. Program’s View of Memory Heap Space Stack Space Unitialized statics (bss) Initialized statics (data) Code (text) Top of Memory Physical Address 0
Copyright © 2001, Daniel W. Lewis. All Rights Reserved. Step 1: CPU Initialization 1 st instruction is fetched from FFFFFFF0 16 –Code and initial values of data in ROM Setup Global Descriptor Table (GDT) –Use a “Flat” Memory Model Three descriptors needed: –Null descriptor (empty & not used, but required by CPU) –Code descriptor (cannot be write enabled) –Data descriptor (must be read/write) Switch to Protected Mode
Copyright © 2001, Daniel W. Lewis. All Rights Reserved. Global Descriptor Base Adrs 31..24 Base Adrs 23..0Seg Length 15..0 Byte 7Byte 6Byte 5Bytes 4,3,2Bytes 1,0 See Text Flat Memory Model: Set Base Address to 0 Set Segment Length to all 1’s (4 GB) 4 most-significant bits of segment length are stored here.
Copyright © 2001, Daniel W. Lewis. All Rights Reserved. Switching to Protected Mode RealMode: ; Arrive here in real mode… MOVEAX,CR0; Get CR0 into EAX ORAL,1; Set Protected Mode bit MOVCR0,EAX; Load new value into CR0 ; Bit 0 of register CR0 has been set. The next inter-segment ; JMP will put the processor in protected mode. DB66h; JMP must use 32-bit offset DB0EAh; Opcode = far jump DDProtMode; offset and selector of DWCODE_SELECTOR; the next instruction ProtMode: ; Execution continues here in protected mode...
Copyright © 2001, Daniel W. Lewis. All Rights Reserved. Step 2: C Run-Time Environment Setup the stack. –LINK.CMD establishes identifiers for the starting and ending addresses of the stack. Copy code and initialized statics from ROM to RAM for faster access. –LINK.CMD establishes identifiers for the starting and ending addresses of code (text) and initialized statics (data). Set all uninitialized statics to zero. –LINK.CMD establishes identifiers for the starting and ending addresses of the uninitialized statics (bss). Setup the heap. –Use all available memory above the stack.
Copyright © 2001, Daniel W. Lewis. All Rights Reserved. Step 3: 8253 Timer Chip Timer 0: Timer Tick –Program to interrupt 1000 times/sec (1 msec). Timer 1: Refresh of Dynamic RAM –Program to refresh 512 rows per 8 msec. Timer 2: Speaker Frequency
Copyright © 2001, Daniel W. Lewis. All Rights Reserved. Step 4: Interrupt System
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Copyright © 2000, Daniel W. Lewis. All Rights Reserved. CHAPTER 10 SHARED MEMORY.
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