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Sezione di Bari September 16, 2002D. Elia - DCS workshop / ALICE week 1 SPD PS system and Controls Domenico Elia, INFN-Bari.

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Presentation on theme: "Sezione di Bari September 16, 2002D. Elia - DCS workshop / ALICE week 1 SPD PS system and Controls Domenico Elia, INFN-Bari."— Presentation transcript:

1 Sezione di Bari September 16, 2002D. Elia - DCS workshop / ALICE week 1 SPD PS system and Controls Domenico Elia, INFN-Bari

2 Sezione di Bari September 16, 2002D. Elia - DCS workshop / ALICE week 2 SPD CS architecture (1) The SPD Control System: 1.Control and Monitoring of HV PS 2.Control and Monitoring of LV PS and regulators 3.Control of Config. Params and Monitoring of LV, T (PILOT) 4.Control and Monitoring of COOLING system SPD CS HV COOLING PILOTLV HV Crate LV PS VR Boards I, V, T Cfg Params

3 Sezione di Bari September 16, 2002D. Elia - DCS workshop / ALICE week 3 SPD CS architecture (2) PVSS main HV PSLV PSVR boardsCoolingSPD SPD CS VME - DAQ JTAG Cfg Params JTAG VR ctrl Ethernet LV, T monitor Set config params Control action on VR Data + I, V, T 21 Interlock

4 Sezione di Bari September 16, 2002D. Elia - DCS workshop / ALICE week 4 SPD PS control: prototype I Ladder 1 Ladder 2 Regolator Board and Control elec. ST L4913 Single scheme for Digital supply Digital supply RS-232C Analog supply Analog PS master Digital PS slave RS-232C 5V ~ 4A 5V ~ 3A LAN /OPC Bias 1 Bias 2 CAEN SY V UART RS-232C LabVIEW application CAEN OPC Server ST L4913 Parallel scheme for Analog supply

5 Sezione di Bari September 16, 2002D. Elia - DCS workshop / ALICE week 5 Steps towards prototype II 1.Design of the new VR board: full set of LV supplies for 1 half-stave (7 voltage regulators) fine tuning of VRs output via on-board DACs output voltages and currents available via on-board ADCs control logic implemented via on-board FPGA control operations by JTAG 2.Implementation of the supervisory control (PVSS): control of HV/LV supplies via PVSS link of PVSS to JTAG controller full integration of HV/LV/VR-boards

6 Sezione di Bari September 16, 2002D. Elia - DCS workshop / ALICE week 6 Long term planning (1) 1.FEE: - definition of Pilot Data frame - definition of DCS part of Router module - definition of interface between Router and ALICE-DCS - prototype chains for I,V monitoring - tests of Analog Pilot (I,V,T) and Digital Pilot - prototype of full FEE monitoring chain with Router 2.Interlocks: - definition of interlock strategy - tests with Analog Pilot - design of interlock box - integration with ALICE Safety System - full working prototype ( In collaboration with P. Chochula )

7 Sezione di Bari September 16, 2002D. Elia - DCS workshop / ALICE week 7 Long term planning (2) 3.Power suppies and VR: - tests and choice of HV/LV PS - prototype of VR board - interface between VR and DCS - integration with interlock and FEE monitoring system 4.Temperature monitoring: - prototype with PT1000 daisy-chain - choice of sensors - design of dedicated bus - test with Analog Pilot - interfacing with DCS 5.Database, 6. Cooling


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