Presentation on theme: "CS1104 – Computer Organization Aaron Tan Tuck Choy School of Computing National University."— Presentation transcript:
CS1104 – Computer Organization Aaron Tan Tuck Choy School of Computing National University of Singapore
CS Lecture 15: I/O Devices and Buses 2 I/O Devices I Anatomy of a Computer Anatomy of a Computer Device Examples and Speeds Device Examples and Speeds Magnetic Disks Magnetic Disks Disk Device Terminology Disk Device Terminology Disk Device Performance Disk Device Performance Disk Transfer Data Rate Disk Transfer Data Rate Synchronizing Processor and I/O Devices Synchronizing Processor and I/O Devices Polling Polling Cost of Polling Cost of Polling Alternative to Polling Alternative to Polling Summary Summary
CS Lecture 15: I/O Devices and Buses 3 Buses Introduction Introduction Advantages of Buses Advantages of Buses Disadvantages of Buses Disadvantages of Buses General Organization of a Bus General Organization of a Bus Master versus Slave Master versus Slave
CS I/O: Anatomy of a Computer4 Five components. Disk (where programs, data live when not running) Processor (active) Computer Control (“brain”) Datapath (“brawn”) Memory (passive) (where programs, data live when running) Devices Input Output Keyboard, Mouse Display, Printer
CS I/O: Device Examples and Speeds5 n I/O Speed: bytes transferred per second (from mouse to display: million-to-1) n DeviceBehaviorPartnerData Rate (Kbytes/sec) KeyboardInputHuman0.01 MouseInputHuman0.02 Line PrinterOutputHuman1.00 Floppy diskStorageMachine50.00 Laser PrinterOutputHuman Optical DiskStorageMachine Magnetic DiskStorageMachine10, Network-LANI or OMachine10, Graphics DisplayOutputHuman30,000.00
CS I/O: Magnetic Disks6 Purpose: Long-term, nonvolatile, inexpensive storage for files Large, inexpensive, slow level in the memory hierarchy Actuator Arm Head Platters
CS I/O: Disk Device Terminology7 Several platters, with information recorded magnetically on both surfaces (usually). Platters Bits recorded in tracks, which in turn divided into sectors (e.g., 512 Bytes) Outer Track Inner Track Sector Actuator moves head (end of arm,one/surface) over track (“seek”), select surface, wait for sector rotate under head, then read or write. Actuator HeadArm Cylinder: all tracks under heads.
CS I/O: Disk Device Performance8 Access time = Seek Time + Rotation Time + Transfer Time + Controller Overhead Seek Time? Depends no. tracks move arm, seek speed of disk Rotation Time? Depends on speed disk rotates, how far sector is from head Transfer Time? Depends on data rate (bandwidth) of disk, size of request Platters Outer Track Inner Track Sector Actuator HeadArm
CS I/O: Disk Transfer Data Rate9 To keep things simple, originally kept same number of sectors per track Since outer track longer, lower bits per inch As competition grew, decided to keep BPI (“constant bit density”) the same for all tracks More capacity per disk more of sectors per track towards edge Since disk spins at constant speed, outer track has faster data rate 1.5X outer track vs. inner track!
CS I/O: Synchronizing Processor and I/O Devices 10 I/O: Synchronizing Processor and I/O Devices 500 MHz microprocessor can execute a 500 million load or store instructions per second, or 200,000 KB/s data rate. I/O devices from 0.01 KB/s to 30,000 KB/s. Input device may not be ready to send data as fast as the processor loads it. Output device may not be ready to accept data as fast as processor stores it. What to do?
CS I/O: Polling11 I/O: Polling Processor checks status before acting. Path to device generally has 2 registers: 1 register says its OK to read/write (I/O ready), often called Control Register. 1 register to contain data, often called Data Register. Processor reads from Control Register in loop, waiting for device to set Ready bit in Control Register to say its OK. Processor then loads from (input) or writes to (output) data register. Load from device/Store into Data Register resets Ready bit of Control Register.
CS I/O: Cost of Polling12 I/O: Cost of Polling Assume for a processor with a 500-MHz clock, it takes 400 clock cycles for a polling operation (call polling routine, accessing the device, and returning). Determine % of processor time for polling. Mouse: polled 30 times/sec so as not to miss user movement. Floppy disk: transfers data in 2-byte units and has a data rate of 50 KB/second. No data transfer can be missed. “Hard” disk: transfers data in 16-byte chunks and can transfer at 4 MB/second. Again, no transfer can be missed.
CS I/O: Cost of Polling13 I/O: Cost of Polling Mouse Polling Clocks/sec = 30 * 400 = clocks/sec % Processor for polling: 12*10 3 /500*10 6 = 0.002% Polling mouse little impact on processor Times Polling Floppy/sec = 50 KB/s /2B = 25K polls/sec Floppy Polling Clocks/sec = 25K * 400 = 10,000,000 clocks/sec % Processor for polling: 10*10 6 /500*10 6 = 2% OK if not too many I/O devices
CS I/O: Cost of Polling14 I/O: Cost of Polling Times Polling Disk/sec = 4 MB/s /16B = 250K polls/sec Disk Polling Clocks/sec = 250K * 400 = 100,000,000 clocks/sec % Processor for polling: 100*10 6 /500*10 6 = 20% Unacceptable
CS I/O: Alternative to Polling15 I/O: Alternative to Polling Wasteful to have processor spend most of its time “spin-waiting” for I/O to be ready. Wish we could have an unplanned procedure call that would be invoked only when I/O device is ready. Interrupt program when I/O ready, return when done with data transfer.
CS I/O: Summary16 I/O: Summary I/O gives computers their 5 senses. I/O speed range is million to one. Processor speed means must synchronize with I/O devices before use. Polling works, but expensive. Interrupts works, but more complex.
CS Bus: Introduction17 Bus: Introduction Transit Link bus? A bunch of wires... Shared communication link. Single set of wires used to connect multiple subsystems. A bus is also a fundamental tool for composing large, complex systems. Control Datapath Memory Processor Input Output
CS Bus: Advantages of Buses18 Bus: Advantages of Buses Versatility: New devices can be added easily Peripherals can be moved between computer systems that use the same bus standard Low Cost: A single set of wires is shared in multiple ways Manage complexity by partitioning the design MemoryProcessor I/O Device
CS Bus: Disadvantages of Buses19 Bus: Disadvantages of Buses It creates a communication bottleneck The bandwidth of that bus can limit the maximum I/O throughput The maximum bus speed is largely limited by: The width of the bus The number of devices on the bus The need to support a range of devices with: vWidely varying latencies vWidely varying data transfer rates
CS Bus: General Organization of a Bus 20 Bus: General Organization of a Bus Control lines: Signal requests and acknowledgments Indicate what type of information is on the data lines Data lines carry information between the source and the destination: Data and Addresses Data Lines Control Lines
CS Bus: Master versus Slave21 Bus: Master versus Slave A bus transaction includes two parts: Issuing the command (and address) – request Transferring the data – action Master is the one who starts the bus transaction by: issuing the command (and address) Slave is the one who responds to the address by: Sending data to the master if the master ask for data Receiving data from the master if the master wants to send data Bus Master Bus Slave Master issues command Data can go either way