Presentation on theme: "1 Fundamentals of Microelectronics II CH9 Cascode Stages and Current Mirrors CH10 Differential Amplifiers CH11 Frequency Response CH12 Feedback."— Presentation transcript:
1 Fundamentals of Microelectronics II CH9 Cascode Stages and Current Mirrors CH10 Differential Amplifiers CH11 Frequency Response CH12 Feedback
2 Chapter 9 Cascode Stages and Current Mirrors 9.1 Cascode Stage 9.2 Current Mirrors
CH 9 Cascode Stages and Current Mirrors3 Boosted Output Impedances
CH 9 Cascode Stages and Current Mirrors4 Bipolar Cascode Stage
CH 9 Cascode Stages and Current Mirrors5 Maximum Bipolar Cascode Output Impedance The maximum output impedance of a bipolar cascode is bounded by the ever-present r between emitter and ground of Q 1.
CH 9 Cascode Stages and Current Mirrors6 Example: Output Impedance Typically r is smaller than r O, so in general it is impossible to double the output impedance by degenerating Q 2 with a resistor.
CH 9 Cascode Stages and Current Mirrors7 PNP Cascode Stage
CH 9 Cascode Stages and Current Mirrors8 Another Interpretation of Bipolar Cascode Instead of treating cascode as Q 2 degenerating Q 1, we can also think of it as Q 1 stacking on top of Q 2 (current source) to boost Q 2 ’s output impedance.
CH 9 Cascode Stages and Current Mirrors9 False Cascodes When the emitter of Q 1 is connected to the emitter of Q 2, it’s no longer a cascode since Q 2 becomes a diode-connected device instead of a current source.
CH 9 Cascode Stages and Current Mirrors10 MOS Cascode Stage
CH 9 Cascode Stages and Current Mirrors11 Another Interpretation of MOS Cascode Similar to its bipolar counterpart, MOS cascode can be thought of as stacking a transistor on top of a current source. Unlike bipolar cascode, the output impedance is not limited by .
CH 9 Cascode Stages and Current Mirrors12 PMOS Cascode Stage
CH 9 Cascode Stages and Current Mirrors13 Example: Parasitic Resistance R P will lower the output impedance, since its parallel combination with r O1 will always be lower than r O1.
CH 9 Cascode Stages and Current Mirrors14 Short-Circuit Transconductance The short-circuit transconductance of a circuit measures its strength in converting input voltage to output current.
CH 9 Cascode Stages and Current Mirrors15 Transconductance Example
CH 9 Cascode Stages and Current Mirrors16 Derivation of Voltage Gain By representing a linear circuit with its Norton equivalent, the relationship between V out and V in can be expressed by the product of G m and R out.
CH 9 Cascode Stages and Current Mirrors17 Example: Voltage Gain
CH 9 Cascode Stages and Current Mirrors18 Comparison between Bipolar Cascode and CE Stage Since the output impedance of bipolar cascode is higher than that of the CE stage, we would expect its voltage gain to be higher as well.
CH 9 Cascode Stages and Current Mirrors19 Voltage Gain of Bipolar Cascode Amplifier Since r O is much larger than 1/g m, most of I C,Q1 flows into the diode-connected Q 2. Using R out as before, A V is easily calculated.
CH 9 Cascode Stages and Current Mirrors20 Alternate View of Cascode Amplifier A bipolar cascode amplifier is also a CE stage in series with a CB stage.
CH 9 Cascode Stages and Current Mirrors21 Practical Cascode Stage Since no current source can be ideal, the output impedance drops.
CH 9 Cascode Stages and Current Mirrors22 Improved Cascode Stage In order to preserve the high output impedance, a cascode PNP current source is used.
CH 9 Cascode Stages and Current Mirrors23 MOS Cascode Amplifier
CH 9 Cascode Stages and Current Mirrors24 Improved MOS Cascode Amplifier Similar to its bipolar counterpart, the output impedance of a MOS cascode amplifier can be improved by using a PMOS cascode current source.
CH 9 Cascode Stages and Current Mirrors25 Temperature and Supply Dependence of Bias Current Since V T, I S, n, and V TH all depend on temperature, I 1 for both bipolar and MOS depends on temperature and supply.
CH 9 Cascode Stages and Current Mirrors26 Concept of Current Mirror The motivation behind a current mirror is to sense the current from a “golden current source” and duplicate this “golden current” to other locations.
CH 9 Cascode Stages and Current Mirrors27 Bipolar Current Mirror Circuitry The diode-connected Q REF produces an output voltage V 1 that forces I copy1 = I REF, if Q 1 = Q REF.
CH 9 Cascode Stages and Current Mirrors28 Bad Current Mirror Example I Without shorting the collector and base of Q REF together, there will not be a path for the base currents to flow, therefore, I copy is zero.
CH 9 Cascode Stages and Current Mirrors29 Bad Current Mirror Example II Although a path for base currents exists, this technique of biasing is no better than resistive divider.
CH 9 Cascode Stages and Current Mirrors30 Multiple Copies of I REF Multiple copies of I REF can be generated at different locations by simply applying the idea of current mirror to more transistors.
CH 9 Cascode Stages and Current Mirrors31 Current Scaling By scaling the emitter area of Q j n times with respect to Q REF, I copy,j is also n times larger than I REF. This is equivalent to placing n unit-size transistors in parallel.
CH 9 Cascode Stages and Current Mirrors32 Example: Scaled Current
CH 9 Cascode Stages and Current Mirrors33 Fractional Scaling A fraction of I REF can be created on Q 1 by scaling up the emitter area of Q REF.
CH 9 Cascode Stages and Current Mirrors34 Example: Different Mirroring Ratio Using the idea of current scaling and fractional scaling, I copy2 is 0.5mA and I copy1 is 0.05mA respectively. All coming from a source of 0.2mA.
CH 9 Cascode Stages and Current Mirrors35 Mirroring Error Due to Base Currents
CH 9 Cascode Stages and Current Mirrors36 Improved Mirroring Accuracy Because of Q F, the base currents of Q REF and Q 1 are mostly supplied by Q F rather than I REF. Mirroring error is reduced times.
CH 9 Cascode Stages and Current Mirrors37 Example: Different Mirroring Ratio Accuracy
CH 9 Cascode Stages and Current Mirrors38 PNP Current Mirror PNP current mirror is used as a current source load to an NPN amplifier stage.
CH 9 Cascode Stages and Current Mirrors39 Generation of I REF for PNP Current Mirror
CH 9 Cascode Stages and Current Mirrors40 Example: Current Mirror with Discrete Devices Let Q REF and Q 1 be discrete NPN devices. I REF and I copy1 can vary in large magnitude due to I S mismatch.
CH 9 Cascode Stages and Current Mirrors41 MOS Current Mirror The same concept of current mirror can be applied to MOS transistors as well.
CH 9 Cascode Stages and Current Mirrors42 Bad MOS Current Mirror Example This is not a current mirror since the relationship between V X and I REF is not clearly defined. The only way to clearly define V X with I REF is to use a diode- connected MOS since it provides square-law I-V relationship.
CH 9 Cascode Stages and Current Mirrors43 Example: Current Scaling Similar to their bipolar counterpart, MOS current mirrors can also scale I REF up or down (I 1 = 0.2mA, I 2 = 0.5mA).
CH 9 Cascode Stages and Current Mirrors44 CMOS Current Mirror The idea of combining NMOS and PMOS to produce CMOS current mirror is shown above.
45 Chapter 10 Differential Amplifiers 10.1 General Considerations 10.2 Bipolar Differential Pair 10.3 MOS Differential Pair 10.4 Cascode Differential Amplifiers 10.5 Common-Mode Rejection 10.6 Differential Pair with Active Load
CH 10 Differential Amplifiers46 Audio Amplifier Example An audio amplifier is constructed above that takes on a rectified AC voltage as its supply and amplifies an audio signal from a microphone.
CH 10 Differential Amplifiers47 “Humming” Noise in Audio Amplifier Example However, V CC contains a ripple from rectification that leaks to the output and is perceived as a “humming” noise by the user.
CH 10 Differential Amplifiers48 Supply Ripple Rejection Since both node X and Y contain the ripple, their difference will be free of ripple.
CH 10 Differential Amplifiers49 Ripple-Free Differential Output Since the signal is taken as a difference between two nodes, an amplifier that senses differential signals is needed.
CH 10 Differential Amplifiers50 Common Inputs to Differential Amplifier Signals cannot be applied in phase to the inputs of a differential amplifier, since the outputs will also be in phase, producing zero differential output.
CH 10 Differential Amplifiers51 Differential Inputs to Differential Amplifier When the inputs are applied differentially, the outputs are 180° out of phase; enhancing each other when sensed differentially.
CH 10 Differential Amplifiers52 Differential Signals A pair of differential signals can be generated, among other ways, by a transformer. Differential signals have the property that they share the same average value to ground and are equal in magnitude but opposite in phase.
CH 10 Differential Amplifiers53 Single-ended vs. Differential Signals
CH 10 Differential Amplifiers54 Differential Pair With the addition of a tail current, the circuits above operate as an elegant, yet robust differential pair.
CH 10 Differential Amplifiers56 Common-Mode Rejection Due to the fixed tail current source, the input common- mode value can vary without changing the output common- mode value.
CH 10 Differential Amplifiers57 Differential Response I
CH 10 Differential Amplifiers58 Differential Response II
CH 10 Differential Amplifiers59 Differential Pair Characteristics None-zero differential input produces variations in output currents and voltages, whereas common-mode input produces no variations.
CH 10 Differential Amplifiers60 Small-Signal Analysis Since the input to Q 1 and Q 2 rises and falls by the same amount, and their bases are tied together, the rise in I C1 has the same magnitude as the fall in I C2.
CH 10 Differential Amplifiers61 Virtual Ground For small changes at inputs, the g m ’s are the same, and the respective increase and decrease of I C1 and I C2 are the same, node P must stay constant to accommodate these changes. Therefore, node P can be viewed as AC ground.
CH 10 Differential Amplifiers62 Small-Signal Differential Gain Since the output changes by -2g m VR C and input by 2 V, the small signal gain is –g m R C, similar to that of the CE stage. However, to obtain same gain as the CE stage, power dissipation is doubled.
CH 10 Differential Amplifiers63 Large Signal Analysis
CH 10 Differential Amplifiers65 Linear/Nonlinear Regions The left column operates in linear region, whereas the right column operates in nonlinear region.
CH 10 Differential Amplifiers66 Small-Signal Model
CH 10 Differential Amplifiers67 Half Circuits Since V P is grounded, we can treat the differential pair as two CE “half circuits”, with its gain equal to one half circuit’s single-ended gain.
CH 10 Differential Amplifiers68 Example: Differential Gain
CH 10 Differential Amplifiers69 Extension of Virtual Ground It can be shown that if R 1 = R 2, and points A and B go up and down by the same amount respectively, V X does not move.
CH 10 Differential Amplifiers70 Half Circuit Example I
CH 10 Differential Amplifiers71 Half Circuit Example II
CH 10 Differential Amplifiers72 Half Circuit Example III
CH 10 Differential Amplifiers73 Half Circuit Example IV
CH 10 Differential Amplifiers74 MOS Differential Pair’s Common-Mode Response Similar to its bipolar counterpart, MOS differential pair produces zero differential output as V CM changes.
CH 10 Differential Amplifiers75 Equilibrium Overdrive Voltage The equilibrium overdrive voltage is defined as the overdrive voltage seen by M 1 and M 2 when both of them carry a current of I SS /2.
CH 10 Differential Amplifiers76 Minimum Common-mode Output Voltage In order to maintain M 1 and M 2 in saturation, the common- mode output voltage cannot fall below the value above. This value usually limits voltage gain.
CH 10 Differential Amplifiers78 Small-Signal Response Similar to its bipolar counterpart, the MOS differential pair exhibits the same virtual ground node and small signal gain.
CH 10 Differential Amplifiers79 Power and Gain Tradeoff In order to obtain the source gain as a CS stage, a MOS differential pair must dissipate twice the amount of current. This power and gain tradeoff is also echoed in its bipolar counterpart.
CH 10 Differential Amplifiers80 MOS Differential Pair’s Large-Signal Response
CH 10 Differential Amplifiers81 Maximum Differential Input Voltage There exists a finite differential input voltage that completely steers the tail current from one transistor to the other. This value is known as the maximum differential input voltage.
CH 10 Differential Amplifiers82 Contrast Between MOS and Bipolar Differential Pairs In a MOS differential pair, there exists a finite differential input voltage to completely switch the current from one transistor to the other, whereas, in a bipolar pair that voltage is infinite.
CH 10 Differential Amplifiers83 The effects of Doubling the Tail Current Since I SS is doubled and W/L is unchanged, the equilibrium overdrive voltage for each transistor must increase by to accommodate this change, thus V in,max increases by as well. Moreover, since I SS is doubled, the differential output swing will double.
CH 10 Differential Amplifiers84 The effects of Doubling W/L Since W/L is doubled and the tail current remains unchanged, the equilibrium overdrive voltage will be lowered by to accommodate this change, thus V in,max will be lowered by as well. Moreover, the differential output swing will remain unchanged since neither I SS nor R D has changed
CH 10 Differential Amplifiers85 Small-Signal Analysis of MOS Differential Pair When the input differential signal is small compared to 4I SS / n C ox (W/L), the output differential current is linearly proportional to it, and small-signal model can be applied.
CH 10 Differential Amplifiers86 Virtual Ground and Half Circuit Applying the same analysis as the bipolar case, we will arrive at the same conclusion that node P will not move for small input signals and the concept of half circuit can be used to calculate the gain.
CH 10 Differential Amplifiers87 MOS Differential Pair Half Circuit Example I
CH 10 Differential Amplifiers88 MOS Differential Pair Half Circuit Example II
CH 10 Differential Amplifiers89 MOS Differential Pair Half Circuit Example III
CH 10 Differential Amplifiers93 MOS Cascode Differential Pair
CH 10 Differential Amplifiers94 MOS Telescopic Cascode
CH 10 Differential Amplifiers95 Example: MOS Telescopic Parasitic Resistance
CH 10 Differential Amplifiers96 Effect of Finite Tail Impedance If the tail current source is not ideal, then when a input CM voltage is applied, the currents in Q 1 and Q 2 and hence output CM voltage will change.
CH 10 Differential Amplifiers97 Input CM Noise with Ideal Tail Current
CH 10 Differential Amplifiers98 Input CM Noise with Non-ideal Tail Current
CH 10 Differential Amplifiers99 Comparison As it can be seen, the differential output voltages for both cases are the same. So for small input CM noise, the differential pair is not affected.
CH 10 Differential Amplifiers100 CM to DM Conversion, A CM-DM If finite tail impedance and asymmetry are both present, then the differential output signal will contain a portion of input common-mode signal.
CH 10 Differential Amplifiers101 Example: A CM-DM
CH 10 Differential Amplifiers102 CMRR CMRR defines the ratio of wanted amplified differential input signal to unwanted converted input common-mode noise that appears at the output.
CH 10 Differential Amplifiers103 Differential to Single-ended Conversion Many circuits require a differential to single-ended conversion, however, the above topology is not very good.
CH 10 Differential Amplifiers104 Supply Noise Corruption The most critical drawback of this topology is supply noise corruption, since no common-mode cancellation mechanism exists. Also, we lose half of the signal.
CH 10 Differential Amplifiers105 Better Alternative This circuit topology performs differential to single-ended conversion with no loss of gain.
CH 10 Differential Amplifiers106 Active Load With current mirror used as the load, the signal current produced by the Q 1 can be replicated onto Q 4. This type of load is different from the conventional “static load” and is known as an “active load”.
CH 10 Differential Amplifiers107 Differential Pair with Active Load The input differential pair decreases the current drawn from R L by I and the active load pushes an extra I into R L by current mirror action; these effects enhance each other.
CH 10 Differential Amplifiers108 Active Load vs. Static Load The load on the left responds to the input signal and enhances the single-ended output, whereas the load on the right does not.
CH 10 Differential Amplifiers109 MOS Differential Pair with Active Load Similar to its bipolar counterpart, MOS differential pair can also use active load to enhance its single-ended output.
CH 10 Differential Amplifiers110 Asymmetric Differential Pair Because of the vastly different resistance magnitude at the drains of M 1 and M 2, the voltage swings at these two nodes are different and therefore node P cannot be viewed as a virtual ground.
CH 10 Differential Amplifiers111 Thevenin Equivalent of the Input Pair
CH 10 Differential Amplifiers112 Simplified Differential Pair with Active Load
CH 10 Differential Amplifiers113 I A Proof of V A << V out
CH 10 Differential Amplifiers114 Chapter 11 Frequency Response 11.1 Fundamental Concepts 11.2 High-Frequency Models of Transistors 11.3 Analysis Procedure 11.4 Frequency Response of CE and CS Stages 11.5 Frequency Response of CB and CG Stages 11.6 Frequency Response of Followers 11.7 Frequency Response of Cascode Stage 11.8 Frequency Response of Differential Pairs 11.9 Additional Examples 114
CH 10 Differential Amplifiers116CH 11 Frequency Response116 High Frequency Roll-off of Amplifier As frequency of operation increases, the gain of amplifier decreases. This chapter analyzes this problem.
CH 10 Differential Amplifiers117 Example: Human Voice I Natural human voice spans a frequency range from 20Hz to 20KHz, however conventional telephone system passes frequencies from 400Hz to 3.5KHz. Therefore phone conversation differs from face-to-face conversation. CH 11 Frequency Response117 Natural Voice Telephone System
CH 10 Differential Amplifiers118 Example: Human Voice II CH 11 Frequency Response118 MouthRecorderAir MouthEarAir Skull Path traveled by the human voice to the voice recorder Path traveled by the human voice to the human ear Since the paths are different, the results will also be different.
CH 10 Differential Amplifiers119 Example: Video Signal Video signals without sufficient bandwidth become fuzzy as they fail to abruptly change the contrast of pictures from complete white into complete black. CH 11 Frequency Response119 High BandwidthLow Bandwidth
CH 10 Differential Amplifiers120 Gain Roll-off: Simple Low-pass Filter In this simple example, as frequency increases the impedance of C 1 decreases and the voltage divider consists of C 1 and R 1 attenuates V in to a greater extent at the output. CH 11 Frequency Response120
CH 10 Differential Amplifiers121CH 11 Frequency Response121 Gain Roll-off: Common Source The capacitive load, C L, is the culprit for gain roll-off since at high frequency, it will “steal” away some signal current and shunt it to ground.
CH 10 Differential Amplifiers122CH 11 Frequency Response122 Frequency Response of the CS Stage At low frequency, the capacitor is effectively open and the gain is flat. As frequency increases, the capacitor tends to a short and the gain starts to decrease. A special frequency is ω=1/(R D C L ), where the gain drops by 3dB.
CH 10 Differential Amplifiers123CH 11 Frequency Response123 Example: Figure of Merit This metric quantifies a circuit’s gain, bandwidth, and power dissipation. In the bipolar case, low temperature, supply, and load capacitance mark a superior figure of merit.
CH 10 Differential Amplifiers124 Example: Relationship between Frequency Response and Step Response CH 11 Frequency Response124 The relationship is such that as R 1 C 1 increases, the bandwidth drops and the step response becomes slower.
CH 10 Differential Amplifiers125CH 11 Frequency Response125 Bode Plot When we hit a zero, ω zj, the Bode magnitude rises with a slope of +20dB/dec. When we hit a pole, ω pj, the Bode magnitude falls with a slope of -20dB/dec
CH 10 Differential Amplifiers126CH 11 Frequency Response126 Example: Bode Plot The circuit only has one pole (no zero) at 1/(R D C L ), so the slope drops from 0 to -20dB/dec as we pass ω p1.
CH 10 Differential Amplifiers127CH 11 Frequency Response127 Pole Identification Example I
CH 10 Differential Amplifiers128CH 11 Frequency Response128 Pole Identification Example II
CH 10 Differential Amplifiers129CH 11 Frequency Response129 Circuit with Floating Capacitor The pole of a circuit is computed by finding the effective resistance and capacitance from a node to GROUND. The circuit above creates a problem since neither terminal of C F is grounded.
CH 10 Differential Amplifiers130CH 11 Frequency Response130 Miller’s Theorem If A v is the gain from node 1 to 2, then a floating impedance Z F can be converted to two grounded impedances Z 1 and Z 2.
CH 10 Differential Amplifiers131CH 11 Frequency Response131 Miller Multiplication With Miller’s theorem, we can separate the floating capacitor. However, the input capacitor is larger than the original floating capacitor. We call this Miller multiplication.
CH 10 Differential Amplifiers132CH 11 Frequency Response132 Example: Miller Theorem
CH 10 Differential Amplifiers133 High-Pass Filter Response The voltage division between a resistor and a capacitor can be configured such that the gain at low frequency is reduced. CH 11 Frequency Response133
CH 10 Differential Amplifiers134 Example: Audio Amplifier In order to successfully pass audio band frequencies (20 Hz-20 KHz), large input and output capacitances are needed. CH 11 Frequency Response134
CH 10 Differential Amplifiers135 Capacitive Coupling vs. Direct Coupling Capacitive coupling, also known as AC coupling, passes AC signals from Y to X while blocking DC contents. This technique allows independent bias conditions between stages. Direct coupling does not. Capacitive Coupling Direct Coupling CH 11 Frequency Response135
CH 10 Differential Amplifiers136 Typical Frequency Response Lower Corner Upper Corner CH 11 Frequency Response136
CH 10 Differential Amplifiers137CH 11 Frequency Response137 High-Frequency Bipolar Model At high frequency, capacitive effects come into play. C b represents the base charge, whereas C and C je are the junction capacitances.
CH 10 Differential Amplifiers138CH 11 Frequency Response138 High-Frequency Model of Integrated Bipolar Transistor Since an integrated bipolar circuit is fabricated on top of a substrate, another junction capacitance exists between the collector and substrate, namely C CS.
CH 10 Differential Amplifiers140CH 11 Frequency Response140 MOS Intrinsic Capacitances For a MOS, there exist oxide capacitance from gate to channel, junction capacitances from source/drain to substrate, and overlap capacitance from gate to source/drain.
CH 10 Differential Amplifiers141CH 11 Frequency Response141 Gate Oxide Capacitance Partition and Full Model The gate oxide capacitance is often partitioned between source and drain. In saturation, C 2 ~ C gate, and C 1 ~ 0. They are in parallel with the overlap capacitance to form C GS and C GD.
CH 10 Differential Amplifiers143CH 11 Frequency Response143 Transit Frequency Transit frequency, f T, is defined as the frequency where the current gain from input to output drops to 1.
CH 10 Differential Amplifiers144 Example: Transit Frequency Calculation CH 11 Frequency Response144
CH 10 Differential Amplifiers145 Analysis Summary The frequency response refers to the magnitude of the transfer function. Bode’s approximation simplifies the plotting of the frequency response if poles and zeros are known. In general, it is possible to associate a pole with each node in the signal path. Miller’s theorem helps to decompose floating capacitors into grounded elements. Bipolar and MOS devices exhibit various capacitances that limit the speed of circuits. CH 11 Frequency Response145
CH 10 Differential Amplifiers146 High Frequency Circuit Analysis Procedure Determine which capacitor impact the low-frequency region of the response and calculate the low-frequency pole (neglect transistor capacitance). Calculate the midband gain by replacing the capacitors with short circuits (neglect transistor capacitance). Include transistor capacitances. Merge capacitors connected to AC grounds and omit those that play no role in the circuit. Determine the high-frequency poles and zeros. Plot the frequency response using Bode’s rules or exact analysis. CH 11 Frequency Response146
CH 10 Differential Amplifiers147 Frequency Response of CS Stage with Bypassed Degeneration In order to increase the midband gain, a capacitor C b is placed in parallel with R s. The pole frequency must be well below the lowest signal frequency to avoid the effect of degeneration. CH 11 Frequency Response147
CH 10 Differential Amplifiers148CH 11 Frequency Response148 Unified Model for CE and CS Stages
CH 10 Differential Amplifiers149CH 11 Frequency Response149 Unified Model Using Miller’s Theorem
CH 10 Differential Amplifiers150 Example: CE Stage The input pole is the bottleneck for speed. CH 11 Frequency Response150
CH 10 Differential Amplifiers152CH 11 Frequency Response152 Direct Analysis of CE and CS Stages Direct analysis yields different pole locations and an extra zero.
CH 10 Differential Amplifiers153CH 11 Frequency Response153 Example: CE and CS Direct Analysis
CH 10 Differential Amplifiers154 Example: Comparison Between Different Methods Miller’s Exact Dominant Pole CH 11 Frequency Response154
CH 10 Differential Amplifiers155CH 11 Frequency Response155 Input Impedance of CE and CS Stages
CH 10 Differential Amplifiers156 Low Frequency Response of CB and CG Stages As with CE and CS stages, the use of capacitive coupling leads to low-frequency roll-off in CB and CG stages (although a CB stage is shown above, a CG stage is similar). CH 11 Frequency Response156
CH 10 Differential Amplifiers157CH 11 Frequency Response157 Frequency Response of CB Stage
CH 10 Differential Amplifiers158CH 11 Frequency Response158 Frequency Response of CG Stage Similar to a CB stage, the input pole is on the order of f T, so rarely a speed bottleneck.
CH 10 Differential Amplifiers159CH 11 Frequency Response159 Example: CG Stage Pole Identification
CH 10 Differential Amplifiers160 Example: Frequency Response of CG Stage CH 11 Frequency Response160
CH 10 Differential Amplifiers161CH 11 Frequency Response161 Emitter and Source Followers The following will discuss the frequency response of emitter and source followers using direct analysis. Emitter follower is treated first and source follower is derived easily by allowing r to go to infinity.
CH 10 Differential Amplifiers162CH 11 Frequency Response162 Direct Analysis of Emitter Follower
CH 10 Differential Amplifiers163CH 11 Frequency Response163 Direct Analysis of Source Follower Stage
CH 10 Differential Amplifiers164 Example: Frequency Response of Source Follower CH 11 Frequency Response164
CH 10 Differential Amplifiers168CH 11 Frequency Response168 Output Impedance of Emitter Follower
CH 10 Differential Amplifiers169CH 11 Frequency Response169 Output Impedance of Source Follower
CH 10 Differential Amplifiers170CH 11 Frequency Response170 Active Inductor The plot above shows the output impedance of emitter and source followers. Since a follower’s primary duty is to lower the driving impedance (R S >1/g m ), the “active inductor” characteristic on the right is usually observed.
CH 10 Differential Amplifiers172CH 11 Frequency Response172 Frequency Response of Cascode Stage For cascode stages, there are three poles and Miller multiplication is smaller than in the CE/CS stage.
CH 10 Differential Amplifiers173CH 11 Frequency Response173 Poles of Bipolar Cascode
CH 10 Differential Amplifiers174CH 11 Frequency Response174 Poles of MOS Cascode
CH 10 Differential Amplifiers175 Example: Frequency Response of Cascode CH 11 Frequency Response175
CH 10 Differential Amplifiers176CH 11 Frequency Response176 MOS Cascode Example
CH 10 Differential Amplifiers177CH 11 Frequency Response177 I/O Impedance of Bipolar Cascode
CH 10 Differential Amplifiers178CH 11 Frequency Response178 I/O Impedance of MOS Cascode
CH 10 Differential Amplifiers179CH 11 Frequency Response179 Bipolar Differential Pair Frequency Response Since bipolar differential pair can be analyzed using half- circuit, its transfer function, I/O impedances, locations of poles/zeros are the same as that of the half circuit’s. Half Circuit
CH 10 Differential Amplifiers180CH 11 Frequency Response180 MOS Differential Pair Frequency Response Since MOS differential pair can be analyzed using half- circuit, its transfer function, I/O impedances, locations of poles/zeros are the same as that of the half circuit’s. Half Circuit
CH 10 Differential Amplifiers181CH 11 Frequency Response181 Example: MOS Differential Pair
CH 10 Differential Amplifiers182 Common Mode Frequency Response C ss will lower the total impedance between point P to ground at high frequency, leading to higher CM gain which degrades the CM rejection ratio. CH 11 Frequency Response182
CH 10 Differential Amplifiers183 Tail Node Capacitance Contribution Source-Body Capacitance of M 1, M 2 and M 3 Gate-Drain Capacitance of M 3 CH 11 Frequency Response183
CH 12 Feedback194 Loop Gain When the input is grounded, and the loop is broken at an arbitrary location, the loop gain is measured to be KA 1.
CH 12 Feedback195 Example: Alternative Loop Gain Measurement
CH 12 Feedback196 Incorrect Calculation of Loop Gain Signal naturally flows from the input to the output of a feedforward/feedback system. If we apply the input the other way around, the “output” signal we get is not a result of the loop gain, but due to poor isolation.
CH 12 Feedback197 Gain Desensitization A large loop gain is needed to create a precise gain, one that does not depend on A 1, which can vary by ±20%.
CH 12 Feedback198 Ratio of Resistors When two resistors are composed of the same unit resistor, their ratio is very accurate. Since when they vary, they will vary together and maintain a constant ratio.
CH 12 Feedback208 Ideal Models of the Four Amplifier Types
CH 12 Feedback209 Realistic Models of the Four Amplifier Types
CH 12 Feedback210 Examples of the Four Amplifier Types
CH 12 Feedback211 Sensing a Voltage In order to sense a voltage across two terminals, a voltmeter with ideally infinite impedance is used.
CH 12 Feedback212 Sensing and Returning a Voltage Similarly, for a feedback network to correctly sense the output voltage, its input impedance needs to be large. R 1 and R 2 also provide a mean to return the voltage. Feedback Network
CH 12 Feedback213 Sensing a Current A current is measured by inserting a current meter with ideally zero impedance in series with the conduction path. The current meter is composed of a small resistance r in parallel with a voltmeter.
CH 12 Feedback214 Sensing and Returning a Current Similarly for a feedback network to correctly sense the current, its input impedance has to be small. R S has to be small so that its voltage drop will not change I out. Feedback Network
CH 12 Feedback215 Addition of Two Voltage Sources In order to add or substrate two voltage sources, we place them in series. So the feedback network is placed in series with the input source. Feedback Network
CH 12 Feedback216 Practical Circuits to Subtract Two Voltage Sources Although not directly in series, V in and V F are being subtracted since the resultant currents, differential and single-ended, are proportional to the difference of V in and V F.
CH 12 Feedback217 Addition of Two Current Sources In order to add two current sources, we place them in parallel. So the feedback network is placed in parallel with the input signal. Feedback Network
CH 12 Feedback218 Practical Circuits to Subtract Two Current Sources Since M 1 and R F are in parallel with the input current source, their respective currents are being subtracted. Note, R F has to be large enough to approximate a current source.
CH 12 Feedback219 Example: Sense and Return R 1 and R 2 sense and return the output voltage to feedforward network consisting of M 1 - M 4. M 1 and M 2 also act as a voltage subtractor.
CH 12 Feedback221 Input Impedance of an Ideal Feedback Network To sense a voltage, the input impedance of an ideal feedback network must be infinite. To sense a current, the input impedance of an ideal feedback network must be zero.
CH 12 Feedback222 Output Impedance of an Ideal Feedback Network To return a voltage, the output impedance of an ideal feedback network must be zero. To return a current, the output impedance of an ideal feedback network must be infinite.
CH 12 Feedback223 Determining the Polarity of Feedback 1) Assume the input goes either up or down. 2) Follow the signal through the loop. 3) Determine whether the returned quantity enhances or opposes the original change.
CH 12 Feedback224 Polarity of Feedback Example I Negative Feedback
CH 12 Feedback225 Polarity of Feedback Example II Negative Feedback
CH 12 Feedback226 Polarity of Feedback Example III Positive Feedback
CH 12 Feedback244 Wrong Technique for Measuring Output Impedance If we want to measure the output impedance of a C-V closed-loop feedback topology directly, we have to place V X in series with K and R out. Otherwise, the feedback will be disturbed.
CH 12 Feedback250 How to Break a Loop The correct way of breaking a loop is such that the loop does not know it has been broken. Therefore, we need to present the feedback network to both the input and the output of the feedforward amplifier.
CH 12 Feedback251 Rules for Breaking the Loop of Amplifier Types
CH 12 Feedback252 Intuitive Understanding of these Rules Since ideally, the input of the feedback network sees zero impedance (Z out of an ideal voltage source), the return replicate needs to be grounded. Similarly, the output of the feedback network sees an infinite impedance (Z in of an ideal voltage sensor), the sense replicate needs to be open. Similar ideas apply to the other types. Voltage-Voltage Feedback
CH 12 Feedback253 Rules for Calculating Feedback Factor
CH 12 Feedback254 Intuitive Understanding of these Rules Since the feedback senses voltage, the input of the feedback is a voltage source. Moreover, since the return quantity is also voltage, the output of the feedback is left open (a short means the output is always zero). Similar ideas apply to the other types. Voltage-Voltage Feedback
CH 12 Feedback267 Breaking the Loop Example VIII
CH 12 Feedback268 Feedback Factor Example VIII
CH 12 Feedback269 Example: Phase Response As it can be seen, the phase of H(jω) starts to drop at 1/10 of the pole, hits -45 o at the pole, and approaches -90 o at 10 times the pole.
CH 12 Feedback270 Example: Three-Pole System For a three-pole system, a finite frequency produces a phase of -180 o, which means an input signal that operates at this frequency will have its output inverted.
CH 12 Feedback271 Instability of a Negative Feedback Loop Substitute jω for s. If for a certain ω 1, KH(jω 1 ) reaches -1, the closed loop gain becomes infinite. This implies for a very small input signal at ω 1, the output can be very large. Thus the system becomes unstable.
CH 12 Feedback272 “Barkhausen’s Criteria” for Oscillation
CH 12 Feedback273 Time Evolution of Instability
CH 12 Feedback274 Oscillation Example This system oscillates, since there’s a finite frequency at which the phase is -180 o and the gain is greater than unity. In fact, this system exceeds the minimum oscillation requirement.
CH 12 Feedback275 Condition for Oscillation Although for both systems above, the frequencies at which |KH|=1 and KH=-180 o are different, the system on the left is still unstable because at KH=-180 o, |KH|>1. Whereas the system on the right is stable because at KH=-180 o, |KH|<1.
CH 12 Feedback276 Condition for Stability ω PX, (“phase crossover”), is the frequency at which KH=-180 o. ω GX, (“gain crossover”), is the frequency at which |KH|=1.
CH 12 Feedback282 Frequency Compensation Phase margin can be improved by moving ω GX closer to origin while maintaining ω PX unchanged.
CH 12 Feedback283 Frequency Compensation Example C comp is added to lower the dominant pole so that ω GX occurs at a lower frequency than before, which means phase margin increases.
CH 12 Feedback284 Frequency Compensation Procedure 1) We identify a PM, then -180 o +PM gives us the new ω GX, or ω PM. 2) On the magnitude plot at ω PM, we extrapolate up with a slope of +20dB/dec until we hit the low frequency gain then we look “down” and the frequency we see is our new dominant pole, ω P ’.
CH 12 Feedback285 Example: 45 o Phase Margin Compensation
CH 12 Feedback286 Miller Compensation To save chip area, Miller multiplication of a smaller capacitance creates an equivalent effect.