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The Muon System Electronics Upgrade Alessandro Cardini on behalf of The LHCb Muon Upgrade Group Cagliari, Ferrara, Firenze, Frascati, PNPI, Roma 1, Roma2.

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Presentation on theme: "The Muon System Electronics Upgrade Alessandro Cardini on behalf of The LHCb Muon Upgrade Group Cagliari, Ferrara, Firenze, Frascati, PNPI, Roma 1, Roma2."— Presentation transcript:

1 The Muon System Electronics Upgrade Alessandro Cardini on behalf of The LHCb Muon Upgrade Group Cagliari, Ferrara, Firenze, Frascati, PNPI, Roma 1, Roma2

2 A. Cardini for the Muon Upgrade Group The Muon System Upgrade in brief Phase 1: get ready for the 40 MHz readout –nODE (with nSYNC ASIC) for an efficient detector readout by TELL40 –L0muon trigger implemented on TELL40 –nPDM and nSB for an efficient chamber pulsing and control using GBT through GBT-SCA LS2 Phase 2: new high readout granularity detectors for high- luminosity regions equipped with a new highly-integrated FEE ASIC –Baseline planning: prototypes then construction, to be LS3 –I will not discuss this part today 213 June 2013

3 Converging to a viable solution A lot of work has been done in the last month - mainly pushed by the time schedule for the upgrade approval within INFN Weekly meeting within the “Muon Electronics Upgrade Group” Meeting within the “Tell40 Firmware Working Group” - where many details were discussed Meetings with L0muon Marseille colleagues to discuss the impact of the new muon system readout architecture on the LLT 13 June 2013A. Cardini for the Muon Upgrade Group3

4 Design considerations / 1 HIT and TDC info on same link? –Pros Direct correspondence between TDC data and logical channel –Cons The number of link to the TRIG40 will increase (need to send TDC info on every link) The latency due to the data generation will increase: HITS are NZS (low latency), but for TDC data a certain form of ZS is needed, and this will require a certain elaboration time  might not be compatible with LLT latency  use separate links 13 June 2013A. Cardini for the Muon Upgrade Group4

5 Design considerations / 2 Use GBT WideBus (112 bits) or not (80 bits)? –Use of GBT WideBus seems much more efficient: +40% information can be transmitted per frame  better use of the bandwidth and important reduction of the number of links –Up to know we have been using a system with 8B/10B encoding (no error correction capabilities and only a minimal capabilities of error detection) and we did not see any problem in this  we believe we could also use WideBus without problems –No need to re-cable M4R1 and M5R1 ODE crates  Use WideBus 13 June 2013A. Cardini for the Muon Upgrade Group5

6 Design considerations / 3 Modularity –We want to use a single nODE type –Taking into account the number of active inputs on our ODEs (120, 168, 192), the number of Trigger Unit (TU) per ODEs and the number of logical channels per TU (10, 14, 16, 24, 28), the usable modularity to be used to group input channels are: No re-cabling  96 o 192 channels By re-cabling M4/M5 R1  64, 96 o 192 channels By re-cabling M4/M5 R1 and with new TB  32, 64, 96 o 192 channels –By using standard (80 bits) mode GBT modularity 96 (or 192) is not usable, this would imply to choose a modularity of 64 or 32 than NEEDS re-cabling  WideBus preferred 13 June 2013A. Cardini for the Muon Upgrade Group6 StationRegion Logical Channels per TU SYNCs per TU Active channels per SYNC TU per ODE (Active Optical links) Active ODE Channels ODE per quadrant per station M2 or M3 R R R `2 R M4 or M5 R124388*1922* R R R

7 System readout architecture Our working hypothesis (Paolo’s hypothesis “E”) –Use GBT WideBus (112 bits) 96 bits for data (hits or TDC info) + 16 bits header (BX counter, ZS information, other info…) –We keep HITS and TDC info separate (on different links) 2 GBT for HITs 2 GBT for TDC info –We use a 32 channel (nSYNC) chip on nODE Max. 32 bits/chip for TDC information (implication on max. occupancy) –We remove Intermediate Boards (IB) in M5R4 –Use High granularity pad detectors in M2R1 (384 pads/chamber) and M2R2 (192 pads/chamber) 13 June 2013A. Cardini for the Muon Upgrade Group7 VTTx GBTx ECS VTRx GBT SCA VTTx New SYNC New SYNC 96 Input ch Trig out TDC out GBTx #1 trig New SYNC GBTx #1 TDC New SYNC New SYNC 96 Input ch Trig out TDC out GBTx #2 trig New SYNC GBTx #2 TDC

8 Paolo Ciambrone INFN- LNF Muon mapping Preliminary Substitute present ODE with nODE –2 GBTx per nODE in wide frame mode format (112 data bit) 96 bit for trigger hits 16 bit for header (format to be defined) Remove IB in M5R4 Use high granularity chambers in M2R1 and M2R2 Hit Link summary 8 StationRegion Active Channels per nODE Logical Channels per TU TU per nODE TU per GBT nSYNC per nODE GBT per nODE nODE per quadrant per station O.L per quadrant per station M2 R R R R M3 R R R R M4 R1 96 /192244/8 43/61 /2 2 3 R R R M5 R1 96 /192244/8 43/61 /2 2 3 R R R nODE required: 35/quadrant  140 in total

9 Paolo Ciambrone INFN- LNF Muon mapping Preliminary The number of O.L. for each region of a quadrant (4 stations) is compatible with 1 AMC40 –If the resources of each AMC40 and/or ATCA40 were enough, 1 TELL 40 could elaborate the data of a quadrant TRIG40 arrangement 9 O.L per quadrant Region M2M3M4 M5tot R R R R ATCA40 Qi R1 AMC40 Qi R2 AMC40 Qi R3 AMC40 Qi R4 AMC40 12 (M2) 4 (M3) 3 (M4) 3 (M5) 12 (M2) 4 (M3) 2 (M4) 2 (M5) 4 (M2) 4 (M3) 2 (M4) 2 (M5) 4 (M2) 4 (M3) 2 (M4) 4 (M5) Custom – 10 Gbps n GBTx n 4 TELL40 required to readout HIT information

10 Paolo Ciambrone INFN- LNF Muon mapping Preliminary TDC Links info 10 StationRegion Active Channels per nODE nSYNC per nODE Active Channels per nSync Max. Occupancy GBT per nODE nODE per quadrant per station O.L per quadrant per station M2 R ~25% R ~25% R ~28% R ~28% M3 R ~28% R ~25% R ~28% R ~28% M4 or M5 R1 96 o o 6 32~25% 1 o R ~28% R ~40% R ~40% M4 or M5 R1 96 o o 6 32~25% 1 o R ~28% R ~40% R ~33% O.L per quadrant Region M2M3M4 M5tot Amc40 per quadrant R R R ,5 R These seem reasonable numbers – to be checked 4 TELL40 required to readout TDC information

11 Muon Detector Control and Pulsing Complex system with more than 600 microcontrollers and 150 flash-based FPGA, controlled by 6 computers, to set front-end parameters, pulse and monitor more than 120k physical channels 13 June 2013A. Cardini for the Muon Upgrade Group11

12 Muon Detector Control Upgrade Up to now we were only considering to replace 8 PDM boards in M2-M5: –Use new clock distribution via GBT –Use GBT-SCA to communicate with old Service Boards (SB), although through a complicated protocol translation (GBT-SCA I 2 C CANbus I 2 C) Experts however considered that: –Current SB are already 10 years old –Based on even older microcontroller boards (ELMB) –Protocol translation would be extremely complicated and absolutely inefficient –Bottleneck is CANbus: we will not improve the current situation where we need 5’ to configure the detectors and more than 20’ to read all scalers We reached the conclusion that it is necessary to built 120 new SB: –All control electronics will be renewed and will be ready to operate up to ~2030 –We will be able to use the high-speed communication via GBT for a fast configuration/reconfiguration on-the-fly of the muon system (that we know is necessary) and for an accurate real-time monitoring of the front-end boards (that is something that we would really take advantage for) 13 June 2013A. Cardini for the Muon Upgrade Group12

13 nPDM block diagram 13 June 2013A. Cardini for the Muon Upgrade Group13 Definition of all details is currently in progress Do we need more than 1 bidirectional GBT link? NO GBT has 16 I/O lines, to connect up to 16 GBT-SCA in parallel, each one directly driving 16 I 2 C lines  we could drive up to 256 I 2 C lines per crate  OK with current setup New backplane implementation? YES: details still to be understood

14 nSB block diagram 13 June 2013A. Cardini for the Muon Upgrade Group14 Depending on new backplane implementation the design of these boards could be slightly different

15 Conclusions The definition of all details of the muon system upgrade is progressing fast Waiting for a feedback from Marseille colleagues on the new readout architecture, but preliminary discussions suggest that is it reasonably ok Muon system upgrade was presented last week to the INFN CSN1 (Commissione Scientifica Nazionale 1) where it was well received and we have been asked to proceed  we are preparing a document for the INFN CTS (Comitato Tecnico Scientifico), to be presented on July 12 Next steps: –July 2013: new architecture defined –October 2013: all details defined –November 2013: new electronics review –January 2014: Muon System Upgrade TDR 13 June 2013A. Cardini for the Muon Upgrade Group15

16 Spare slides

17 New high-granularity M2R1 detectors Keeping the current logic layout every detector will have 384 pads grouped in 4 TU of 87 logical pads –2 nODE / detector  6 nODE / quadrant –Every nODE will have 174 active inputs (2 TU of 87 logical pads) –Need 12 links/ quadrant  +16 nODE 13 June 2013A. Cardini for the Muon Upgrade Group17

18 New high-granularity M2R2 detectors Keeping the current logic layout every detector will have 192 pads grouped in 4 TU of 48 logical pads –1 nODE / detector  6 nODE / quadrant –Every nODE will have 192 active inputs (4 TU of 48 logical pads) –Need 12 links/ quadrant  +16 nODE 13 June 2013A. Cardini for the Muon Upgrade Group18

19 Paolo Ciambrone INFN- LNF ODE Upgrade Senza ricablaggio (sono mostrati solo i primi 96 canali, i secondi 96 sono uguali) ODE Input Connectors M2/M3 R2:16 Logical channels per TU (Le pad catodiche passano per le IB, le pad dei fili vanno direttamente alle ODE) M4/M5 R2:14 Logical channels per TU M4/M5 R3/R4:10 Logical channels per TU M4/M5 R1:24 Logical channels per TU TU 1 TU 2 TU 3 TU 1 TU 2 TU 3 TU 4 TU 1 TU 2 TU 3 TU 4 TU 5 TU 6 TU 1 TU 2 TU 3 TU 4 TU 5 TU 6 TU 1 TU 2 TU 3 TU 4 TU 5 TU 6 M2/M3 R1:28 Logical channels per TU (2 tipi di Tb a causa dell’orientamento dei canali logici) TU 1 TU 2 TU 3 M2/M3 R3/R4:28 Logical Channels per TU Canali logici attivi sul connettore di ingresso Canali non “attivi” (floating) sul connettore di ingresso Canali logici appartenenti alla stessa TU 19

20 Paolo Ciambrone INFN- LNF ODE Upgrade TU 1 TU 2 TU 3 Ricablando M4/M5 R1 (sono mostrati solo i primi 96 canali, i secondi 96 sono uguali, ad eccezione di M4/M5 R1 che deve avere un cablaggio speculare rispetto ai primi 96) ODE Input Connectors M2/M3 R2:16 Logical channels per TU (Le pad catodiche passano per le IB, le pad dei fili vanno direttamente alle ODE) M4/M5 R2:14 Logical channels per TU M4/M5 R3/R4:10 Logical channels per TU M4/M5 R1:24 Logical channels per TU (nei secondi 96 canali il cablaggio è speculare) TU 1 TU 2 TU 3 TU 1 TU 2 TU 3 TU 4 TU 5 TU 6 TU 1 TU 2 TU 3 TU 4 TU 5 TU 6 TU 1 TU 2 TU 3 TU 4 TU 5 TU 6 M2/M3 R1:28 Logical channels per TU (2 tipi di Tb a causa dell’orientamento dei canali logici) TU 1 TU 2 TU 3 M2/M3 R3/R4:28 Logical Channels per TU Canali logici attivi sul connettore di ingresso Canali non “attivi” (floating) sul connettore di ingresso Canali logici appartenenti alla stessa TU 20

21 Paolo Ciambrone INFN- LNF ODE Upgrade TU 1 TU 2 Ricablando M4/M5 R1 e cambiando la TB (sono mostrati solo i primi 96 canali, i secondi 96 sono uguali) ODE Input Connectors M2/M3 R2:16 Logical channels per TU (Le pad catodiche passano per le IB, le pad dei fili vanno direttamente alle ODE) M4/M5 R2:14 Logical channels per TU M4/M5 R3/R4:10 Logical channels per TU M4/M5 R1:24 Logical channels per TU TU 1 TU 2 TU 3 TU 1 TU 2 TU 3 TU 4 TU 5 TU 6 TU 1 TU 2 TU 3 TU 4 TU 5 TU 6 TU 1 TU 2 TU 3 TU 4 TU 5 TU 6 M2/M3 R1:28 Logical channels per TU (2 tipi di Tb a causa dell’orientamento dei canali logici) TU 1 TU 2 TU 3 M2/M3 R3/R4:28 Logical Channels per TU Canali logici attivi sul connettore di ingresso Canali non “attivi” (floating) sul connettore di ingresso Canali logici appartenenti alla stessa TU TU 3 21

22 13 June 2013A. Cardini for the Muon Upgrade Group22 (Hits) (TDC) 6 optical links required / nODE

23 13 June 2013A. Cardini for the Muon Upgrade Group23 nSYNC block diagram

24 System readout architecture / 2 Design considerations and first decisions taken: –Need to readout both HITs and their time (TDC): time information is required to time align the detector and to monitor it –HIT and TDC info on same/different link?  two different links –Modularity: only one nODE type and we will not change the cabling on the back of the crates  96 bits for data (naturally compatible only with WideBus) + 16 bits for additional information (Bxid, …) –GBT WideBus (112 bits) or not (80 bits)?  WideBus –A new ASIC for nODE  a 32 channels nSYNC 13 June 2013A. Cardini for the Muon Upgrade Group24

25 System readout architecture / 3 Current system layout… –  104 nODE, 4 TELL40 for HIT and L0muon readout, 3 TELL40 for muon TDC info –Very compact system, no need to exchange data between AMC40 outside ATCA40 + Remove IB from M5R4… –M5R4 is readout by 2 IB/quadrant –  108 nODE, 4 TELL40 for HIT and L0muon readout, 3 TELL40 for muon TDC info + New high-granularity detectors in M2R12 (see next 2 slides) –Need to add 32 nODE (or the equivalent of it) to readout 12 M2R1 detectors with 384 pads and 24 M2R2 detectors with 192 pads –  140 (equiv.) nODE, 4 TELL40 for HIT and L0muon readout, 4 TELL40 for muon TDC info Verification of all details with Marseille colleagues in progress 13 June 2013A. Cardini for the Muon Upgrade Group25


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