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Types of BJT Biasing Circuits By G.Kavitha ECE Dept Paavai Engineering College

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Biasing Circuits of the BJT Normally, three types of circuits are used to establish dc biasing in a BJT, these are; (a) Fixed bias circuit (b) Collector-to-Base Bias Circuit (c) Voltage-Divider with Self-Bias Circuit (or) Self-Bias (or) Emitter Bias (or) Emitter-Stabilized Bias Circuit While designing the all four types of biasing circuits of BJT it is aimed to obtain Q-point parameters (I BQ, I CQ, V CEQ )

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Fixed Bias

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The Base-Emitter Loop From Kirchhoffs voltage law: +V CC – I B R B – V BE = 0 Solving for base current :

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Collector-Emitter Loop Collector current: From Kirchhoffs voltage law:

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Saturation When the transistor is operating in saturation, current through the transistor is at its maximum possible value.

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Load Line Analysis I Csat CCCC I C = V CC / R C CE V CE = 0 V V CEcutoff CECC V CE = V CC C I C = 0 mA B B where the value of R B sets the value of I B CEC that sets the values of V CE and I C The Q-point is the operating point: The end points of the load line are:

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Collector to Base Bias

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Base-Emitter Loop From Kirchhoffs voltage law: Where I B << I C : Knowing I C = I B and I E I C, the loop equation becomes: Solving for I B :

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Collector-Emitter Loop From Kirchhoffs voltage law: Since I C I C and I C = I B : Solving for V CE :

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Voltage Divider Bias (or) Self Bias

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Approximate Analysis Where I B << I 1 and I 1 I 2 : Where R E > 10R 2 : From Kirchhoffs voltage law:

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Voltage Divider Bias Analysis Transistor Saturation Level Load Line Analysis Cutoff:Saturation:

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Emitter-Stabilized Bias Circuit

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Base-Emitter Loop From Kirchhoffs voltage law: Since I E = ( + 1)I B : Solving for I B :

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Collector-Emitter Loop From Kirchhoffs voltage law: Since I E I C : Also:

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Improved Biased Stability Stability refers to a circuit condition in which the currents and voltages will remain fairly constant over a wide range of temperatures and transistor Beta ( ) values. Adding RE to the emitter improves the stability of a transistor.

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Saturation Level : V CEcutoff :I Csat : The endpoints can be determined from the load line.

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Emitter-Stabilized Bias Circuit

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Base-Emitter Loop From Kirchhoffs voltage law: Where I B << I C : Knowing I C = I B and I E I C, the loop equation becomes: Solving for I B :

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Collector-Emitter Loop From Kirchhoffs voltage law: Since I C I C and I C = I B : Solving for V CE :

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Base-Emitter Bias Analysis Transistor Saturation Level Load Line Analysis Cutoff:Saturation:

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