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Fundamental Electronics—BJT, CMOS

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1 Fundamental Electronics—BJT, CMOS
Reference: Thomas L. Floyd, Electronics Fundamentals: Circuits, Devices, and Applications, Pearson Education Inc

2 Reference Books 1 Electronics Fundamentals: Circuits, Devices, and Applications Thomas L. Floyd Pearson Education Inc. 2 Electronic circuit analysis and Design Donald A , Neaman Irwin 3 Microelectronics:DIGITAL AND ANALOG CIRCUITS AND SYSTEMS Jacob Millman, Arvin Grabel McGraw-Hill 4 Microelectronic Circuits Sedra & Smith Oxford University Press

3 Objectives The History of VLSI
Describe the basic structure and operation of bipolar junction transistors (BJT) Describe the basic structure and operation of MOSFETs Describe the basic structure and operation of CMOS

4 The History of VLSI IC(Integrated Circuits) History Evolution
vacuum tube, single transistor, IC (Integrated Circuits) SSI, MSI, LSI, VLSI, SoC

5 The History of VLSI 1926—Lilienfeld proposed FET
1947—Brattin, Bardin, Schockley proposed BJT from Bell Lab. 1957—TI Kilby proposed the first IC 1960– Hoerni invent the planar process 70’s—IC composed mainly by pMOS and BJT

6 The History of VLSI 80’s—IC composed mainly by nMOS and BJT
90’s—IC composed mainly by CMOS and BiCMOS 1995—NEC, AT&T, Phillips proposed SOC

7 The evolution of IC technique
1947 1950 1961 1966 1971 1980 1985 1990 Transistor Single component SSI MSI LSI VLSI ULSI GSI Logic Gate count ---- 10 100 ~ 1000 20000 500,000 > 10,000,000 Produ-ction 電晶體 二極體 平面元件 邏輯閘 暫存器 計數器 多工器 加法器 8bit微處理器 ROM RAM 16/32bits微處理器 即時影像處理器 SOC

8 Moore’s Law plot The transistor count in an IC would double every 18 momths

9 Main Families in Digital Logic
TTL(implemented by BJT)—big area, high consumption, high speed MOS — small area, low consumption, low speed BiCMOS — speed near TTL, area near MOS, hard manufacture

10 Architecture of BJTs The bipolar junction transistor (BJT) is constructed with three doped semiconductor regions separated by two pn junctions Regions are called emitter, base and collector

11 Architecture of BJTs There are two types of BJTs, the npn and pnp
The two junctions are termed the base-emitter junction and the base-collector junction The term bipolar refers to the use of both holes and electrons as charge carriers in the transistor structure In order for the transistor to operate properly, the two junctions must have the correct dc bias voltages the base-emitter (BE) junction is forward biased(>=0.7V for Si, >=0.3V for Ge) the base-collector (BC) junction is reverse biased

12 FIGURE Transistor symbols.
Thomas L. Floyd Electronics Fundamentals, 6e Electric Circuit Fundamentals, 6e Copyright ©2004 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved.

13 Basic circuits of BJT

14 Operation of BJTs BJT will operates in one of following four region
Cutoff region (for digital circuit) Saturation region (for digital circuit) Linear (active) region (to be an amplifier) Breakdown region (always be a disaster)

15 Operation of BJTs

16 DC Analysis of BJTs Transistor Currents: IE = IC + IB alpha (DC)
IC = DCIE beta (DC) IC = DCIB DC typically has a value between 20 and 200

17 DC Analysis of BJTs DC voltages for the biased transistor:
Collector voltage VC = VCC - ICRC Base voltage VB = VE + VBE for silicon transistors, VBE = 0.7 V for germanium transistors, VBE = 0.3 V

18 Q-point The base current, IB, is established by the base bias
The point at which the base current curve intersects the dc load line is the quiescent or Q-point for the circuit

19 Q-point

20 DC Analysis of BJTs The voltage divider biasing is widely used
Input resistance is: RIN  DCRE The base voltage is approximately: VB  VCCR2/(R1+R2)

21 BJT as an amplifier Class A Amplifiers Class B Amplifiers

22 BJT Class A Amplifiers In a class A amplifier, the transistor conducts for the full cycle of the input signal (360°) used in low-power applications The transistor is operated in the active region, between saturation and cutoff saturation is when both junctions are forward biased the transistor is in cutoff when IB = 0 The load line is drawn on the collector curves between saturation and cutoff

23 BJT Class A Amplifiers

24 BJT Class A Amplifiers Three biasing mode for class A amplifiers
common-emitter (CE) amplifier common-collector (CC) amplifier common-base (CB) amplifier

25 BJT Class A Amplifiers A common-emitter (CE) amplifier
capacitors are used for coupling ac without disturbing dc levels

26 BJT Class A Amplifiers A common-collector (CC) amplifier
voltage gain is approximately 1, but current gain is greater than 1

27 BJT Class A Amplifiers The third configuration is the common-base (CB)
the base is the grounded (common) terminal the input signal is applied to the emitter output signal is taken off the collector output is in-phase with the input voltage gain is greater than 1 current gain is always less than 1

28 BJT Class B Amplifiers When an amplifier is biased such that it operates in the linear region for 180° of the input cycle and is in cutoff for 180°, it is a class B amplifier A class B amplifier is more efficient than a class A In order to get a linear reproduction of the input waveform, the class B amplifier is configured in a push-pull arrangement The transistors in a class B amplifier must be biased above cutoff to eliminate crossover distortion

29 BJT Class B Amplifiers

30 The BJT as a Switch When used as an electronic switch, a transistor normally is operated alternately in cutoff and saturation A transistor is in cutoff when the base-emitter junction is not forward-biased. VCE is approximately equal to VCC When the base-emitter junction is forward-biased and there is enough base current to produce a maximum collector current, the transistor is saturated

31 The BJT as a Switch

32 An example -- NOR

33 Architecture of MOS Field-Effect Transistors (FETs)
The metal-oxide semiconductor field-effect transistor (MOSFET) : the gate is insulated from the channel by a silicon dioxide (SiO2) layer

34 Architecture of MOS Field-Effect Transistors (FETs)
Two types of MOSFETs depletion type (D-MOSFETs) have a physical channel between Drain and Source, with no voltage applied to the Gate enhancement type (E-MOSFETs) have no physical Drain-Source channel

35 Architecture of MOS Field-Effect Transistors (FETs)
D-MOSFET Channel may be enhanced or restricted by gate voltage E-MOSFET Channel is created by gate voltage

36 Simplified symbol

37 Biasing Circuits

38 FET Amplifiers Voltage gain of a FET is determined by the transconductance (gm) with units of Siemens (S) gm = Id / Vg The D-MOSFET may also be zero-biased The E-MOSFET requires a voltage-divider-bias All FET’s provide extremely high input resistance

39 Principle of MOSFET for E-MOS (n-channel)
(+)

40 Principle of MOSFET for E-MOS (n-channel)
:The threshold voltage

41 Principle of MOSFET for E-MOS (n-channel)

42 Principle of MOSFET for D-MOS (n-channel)

43 Principle of MOSFET for D-MOS (n-channel)

44 Voltage-current relations

45 p-cnannel MOS (pMOS) All the characteristics are similar to NMOS. - -
n-substrate S G D B - - + body All the characteristics are similar to NMOS.

46 An inverter

47 Voltage transfer -- see the time delay

48 Complementary MOS (CMOS)
Vss output Vdd pMOS nMOS in out Vss Vdd input P N p-well n-substrate


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