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Background - IT Market Disruption

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Presentation on theme: "Background - IT Market Disruption"— Presentation transcript:

0 Ultra Thin HDI Multi-purpose Test Vehicle
Definition Stage Project C.B. Katzko, TTM Technologies HDPUG Member Meeting, 2014 June 04 Düren, Germany Hosted by Isola © High Density Packaging Users Group, Inc.

1 Background - IT Market Disruption
Our “Post PC Era” : Sales of desktop & laptops declining Smartphones & tablets becoming dominant internet user devices Cloud Computing and SAAS eroding the packaged software model Ultrabooks, hybrids and “modular” PCs replacing traditional PCs Commodity servers rivaling OEM brand systems for internet enterprises “Internets of Things” = explosion of embedded system modules Source : Gartner Research © High Density Packaging Users Group, Inc.

2 Background - User Device Trends
Wealthy nations near saturation, global market lead by emerging nations has room for growth Tablets on a high growth curve as lower cost “minis” & “phablets” surpass notebook PCs Source : Internet Trends 2014 – Code Conference, Mary Meeker, KPCB PDF Link :

3 Background – End Use Trends
Outrank USA on total time, Smartphone & Tablet usage USA Highest smartphone internet use, e-banking/e-commerce leader in Africa Age demographics – JP is a poster child of the global trend “Café” not “Internet Café”? Source : Internet Trends 2014 – Code Conference, Mary Meeker, KPCB PDF Link :

4 Background - Modular Computing
Remaking the desktop: DIY - add your own DDR3, wireless, SSD or HDD Intel ® NUC Next Unit of Computing PCBs - conventional MLB & HDI trending to stacked via BGA Open Compute Project “vanity-free” processor sled – OEM/ODMs joining these projects Intel ® NUC Next Unit of Computing Ars Technica – 2014 Jan 06

5 Background – Handhelds
PCBs – leading edge HDI/ALV Flex & Rigid Flex ALV-HDI logic board populated 2 sides Li-ion Battery flex PCB camera flex PCB camera/sensors flex PCB home button rigid-flex PCB audio jack, lighting port integrated display panel flex PCBs switches & sensors flex PCB video driver shield HDI PCB audio/speaker PoP SoC Source : iFixit © High Density Packaging Users Group, Inc.

6 Background – HDI/ALV Design
Handheld/wearable electronic packaging: Design envelope dominated by batteries & displays Miniaturized & modularized PCBA design with high flex content Extensive use of SoC & MEMs, with SiP, PoP & WCSP packaging Low profile CSP, WCSP & microQFN devices, 0.40~0.30mm pitch Ultra-thin 8-14 Layer HDI PCB design, current and near term: Via in Pad/stacked via ICT with decreasing pad diameter Conductor line/space design rules approaching 40/60um 2 track routing in 0.40umm pitch devices up to 36x36 BGA 25~40um dielectrics 250~800um thickness Flex & coreless HDI How does the performance & reliability stack-up? © High Density Packaging Users Group, Inc.

7 Background – HDI/ALV Roadmap
BGA Design Rules (microns) BGA Pitch Signal Routing Inner Line Inner Space Laser Via Inner Pad Outer Pad SM Opening Remarks 0.40mm 1 Track 0.7 - 100 200 225 300 JISSO Roadmap 60 65 75 275 Current Practice 2 Track 40 45 180 255 Next Gen High I/O SoC, requires mSAP 0.30mm 50 150 240 175 30 Forecast, requires mSAP 0.25mm JISSO Roadmap, requires mSAP 0.15mm 25 JISSO Roadmap, requires coreless & SAP Dielectric Thickness (microns) Min BGA Core Layer Build-up Layer Total Layers 10 Current Practice STD HDI 10 ~ 12 Current Practice ADV HDI Next Generation ADV HDI 30 ~ 35 Forecast At limit or beyond subtractive process

8 Project – Purpose & Objectives
Problem Test vehicles for BGA & HDI technology lag by a decade Do not reflect current design practice & materials Falling into dis-use by practitioners in favor of EOL product testing Creating a void in up-stream device and materials development Objective Create/validate an open source ALV-HDI test vehicle based on current & near term Smartphone design practice General purpose test patterns for ALV PCB and assembly level tests Reference drop test vehicle for JESD-B (existing design) Smartphone forma factor for JESD-B validation (new design) Run validation tests for proof or concept/design & standardization © High Density Packaging Users Group, Inc.

9 Project – Goals & Deliverables
Build a collaborative working group handheld product technology within HDP for this and future projects Stakeholders from Materials, PCB, Packaging and Assembly Establish a suite of basic methods and tools suitable for the general assessment of the technology Build & test first generation TV designs for validation Deliverables: Generic, modular, Test Vehicle form factor spec & DFM guidelines General purpose test vehicle & drop test vehicle designs in Gerber Demonstrator samples for future reference Test data and reports for proof of concept build

10 Project – TV Design Goals
The TV form factor should have the capability to: Scale to smartphone or handheld device form factors, materials sets and production formats typical of the art Include as a design technology baseline: Modularized, based on 50mm x 50mm increments for various mixes of bare board & assembly TVs 0.40mm pitch BGA & 0.30mm pitch WCSP test devices 01005 chip passives (low value or zero ohm resistors) 40/60um nominal line/space design rules All Layer Via interconnect with stacked vias, Via in Pad 12 layer build-up in plane/signal pattern configuration and pattern density typical of the art for Smartphone logic boards PCB materials typical of the art with FR4.1 with 1037 & reinforcement incorporated in the design © High Density Packaging Users Group, Inc.

11 General Project Work Flow
current status PCBA TV Drop TV Data Analysis & Failure Analysis PCBA Assembly & ICT PCB Fabrication & SOT PCB TV PoC Build & Test ( reflow, MSA ) PCB TV Redesign ( if required) PCBA Assembly Tooling Design & Preparation PCB Materials Components & Assembly Materials AATS Drop Tests Test Report Paper & Poster PCB TV Short Term Tests Long Term Tests End Start PCB TV Design & Tooling Idea Stage Implementation Stage

12 Test Work Flow PCB & AATS TV
8 sets Start PCB TV Test Kit Without Conditioning Reflow Simulation 6x, 12x 0.40mm BGA 0.25mm BGA 01005 passive PCBA TV Assembly & Kit - Mechanical - Thermal - IST IST Pass triggers ASSY CAF 1000 hrs AATS 2000 x Data Analysis, Failure Analysis & Reporting End AATS 2000x or beyond (to fail)

13 Test Work Flow Drop Test Vehicles
8 sets of coupons Start 8 test boards Drop Test TV PCB couppns Without Conditioning Reflow Simulation 6x, 12x 0.40mm BGA 0.30mm WCSP PCBA TV Assembly & Kit 4 Point Bend JEDEC Drop IST Pass triggers ASSY Data Analysis, Failure Analysis & Reporting End - Mechanical - Thermal - IST

14 Project Task List

15 Work Progress – PCB TV Prototype
peel strength strips thermal analysis (w/ copper) (w/o copper) High-Pot layer/layer line/line 4 point bend BGA ball shear/pull multi-pattern delamination stacked via hole/hole CAF 0.30/0.40mm layer/layer CAF PTH hole/hole CAF 0.60/0.50mm pitch PTH daisy-chain 0.60/0.50mm pitch stacked via daisy-chain 0.30/0.40mm stacked via IST coupons 0.30/0.40mm line/line CAF 75/50um spacing

16 Active Participants Engent Fei Xie Kyzen Mike Bixenmann Panasonic
Tony Senese TTM Tommy Huang Angela Lee Summer Xiao C.B. Katzko Project Leader HDPUG Ruben Bergman Robert Smith Project Facilitator

17 Supporters & Friends Alcatel-Lucent Joseph Smetana ITEQ Robert Hung
Boeing Kenneth C. Noddings Kyzen Mike Bixenmann Curtiss-Wright Ivan Straznicky Nihon Superior Keith Howell Engent Dan Baldwin Panasonic Abe Tomoyuki Paul Houston Park Electro Silvio Bertling Flextronics Jennifer Nguyen Poltronic Paul Collander HDPUG Jack Fisher Sekisui Hiroya Ishida Lawrence Schultz Shengyi Sytech Kevin Zhang Marshall Andrews TTM Technologies Zaron Huang Hitachi Chemical Ken Hikida Marika Immonen Takahiro Tanabe Tarja Rapala Isola Fred Hickman Texas Instruments Luu Nguyen TUC Alan Cochrane

18 © High Density Packaging Users Group, Inc.
Thank You Q&A © High Density Packaging Users Group, Inc.

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