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P1801 PAR Extension Motivation Address deferred issues Consider further UPF/CPF convergence SAIF integration and extension Continue to raise the abstraction.

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Presentation on theme: "P1801 PAR Extension Motivation Address deferred issues Consider further UPF/CPF convergence SAIF integration and extension Continue to raise the abstraction."— Presentation transcript:

1 P1801 PAR Extension Motivation Address deferred issues Consider further UPF/CPF convergence SAIF integration and extension Continue to raise the abstraction level Revisions Consistent use of terminology in Scope, Purpose & Need o Power Intent vs Design Intent o Low Power vs Energy Aware More abstract definition of power intent o system level power intent, modelling and analysis

2 Scope This standard establishes defines the syntax and semantics of a format used to define express the low power design intent for in energy aware electronic systems and electronic intellectual property design. The format provides the ability to specify the supply network, switches, isolation, retention and other aspects relevant to power management of an electronic system. Power intent includes the concepts and information required for specification and validation, implementation and verification, and modelling and analysis of power managed electronic systems. The standard also defines the relationship between the low power design specification power intent captured in this format and the logic design specification design intent captured via other formats (e.g., standard hardware description languages).

3 Purpose The standard provides enables portability of low power design specifications power intent that can be used with across a variety of commercial products throughout an electronic system design, analysis, verification and implementation flow.

4 Need for Project As electronics manufacturing process technology has advanced, power management has become a dominant factor in electronic system optimization. The industry has employed new design techniques to reduce static and dynamic energy consumption. These techniques are not possible to capture in existing standard hardware description languages such as SystemVerilog (IEEE Std-1800), Verilog (IEEE Std-1364), VHDL (IEC/IEEE Std ) and SystemC (IEEE Std-1666) which support specification of design intent but not the specification of power intent. This standard replaces non- portable proprietary formats and eliminates the need for specifying the same information multiple times in different forms, which is a common source for errors in the design flow. This standard enables the electronics industry to more easily design energy aware electronic systems that consume less power and generate less heat, resulting in economic and ecological benefits. This project will update IEEE Std based on learning from the use of the standard. Since energy aware design technology and methodology is advancing rapidly, this standard must continue to evolve in parallel to address these new requirements.


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