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Designing Embedded Hardware 02 Assembly Language Yonam Institute of Digital Technology.

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Presentation on theme: "Designing Embedded Hardware 02 Assembly Language Yonam Institute of Digital Technology."— Presentation transcript:

1 Designing Embedded Hardware 02 Assembly Language Yonam Institute of Digital Technology

2 Programming Language Assembly Language 2 Machine code Java C Assembly Complier Assembler Disassembly

3 Assembly Language 3 int sum(int x, int y) { int t = x + y; return t; } _sum: pushl %ebp; movl %esp, %ebp movl 12(%ebp), %eax addl 8(%ebp), %eax movl %ebp, %esp popl %ebp ret 0x55 0x89 0xe5 0x8b 0x45 0x0c 0x03 0x45 0x08 0x89 0xec 0x5d 0xc3 sum.c sum.S

4 Assembly Language Pros ▫help users to understand what the processor is doing and how your computer actually works ▫enable users to get optimum performance with a smaller code space Cons ▫harder to maintain ▫have zero portability to other processor Assembly Language 4

5 Registers The internal storage for the processor ▫The number of registers varies significantly among processor architectures. ▫The number of a processor bits refers to the width of its registers Kinds of registers ▫General-purpose ▫Special-purpose  Index register  Program counter or instruction pointer  Status register or CCR (Condition-Code Register)  Control register  Shadow register Assembly Language 5

6 Machine Code Assembly Language B BD What do these mean? OPCODE LDDA #$41 STAA $0100 JSR $0200 Mnemonics for 68HC11

7 Appendix: Different Assembly Codes ProcessorInstruction Motorola 6800/68HC11LDAA #$41 Intel x86mov al, 41h Motorola 680x0move.b #$41, D0 PIC16xxmovlw 0x41 Motorola 56000move #$0041, A Intel 80960lda 0x41, r4 7

8 Numbers Assembly Language or -1 ?

9 Singed Numbers Assembly Language LSB 2) MSB 1) 1)MSB: Most Significant Bit 2)LSB: Least Significant Bit sign bit (0: positive, 1: negative) How to convert a positive number to its negative equivalent (two’s complement) (0x03) = (0xFC) (0xFD) = -3 Positive number Invert bits (one’s complement) Add 1 gives

10 Addressing Mode 1) (1/2) opcoderegister 10 1)Addressing mode refers to the different way in which an instruction can reference a register or memory location Inherent opcodedata Immediate/Literal opcodeaddr ll Direct data Memory ll

11 Addressing Mode (2/2) 11 opcodeaddr hhll Extended data Memory hhll opcode2 Indexed hhll Index register + hhll + 2

12 Endian 1) )Endian refers to the way in which the processor stores data to memory x00FF 0x0100 0x0101 0x0102 0x0103 0x0104 Big-EndianLittle-Endian Memory 0x

13 Assembly Language 13 Assembly Code add_numbers LDAA #$ B 1F ADDA #$1F 01048B 0C ADDA #$0C 0106B STAA $ RTS sum = 0x10 + 0x1F + 0x0C ;PC (Program Counter) 0x0100 0x0102 0x0104 0x0106 0x0109 Return_addr

14 Disassembly Assembly Language 14 LDS #$5678 LDAA #$56 ANDA #$06 PSHA INCA PSHA 0x8E 0x56 0x78 0x86 0x56 0x84 0x06 0x36 0x4C 0x36 Assemble Disassemble Machine Code: 8E C 36

15 Position-Independent Code Assembly Language 15 Assembly module Subroutine call Where is the subroutine to be called? Is this subroutine always located at the same address?

16 Loops Assembly Language 16 AddressOpcodesAssembly FLDAA #$0F 01024A againDECA FDBNE again LDAA #$0F again DECA BNEagain

17 Bitwise Operation NOT : NOT 0111 = 1000 OR : 0101 OR 0011 = 0111 AND (Mask) : 1101 AND 0001 = 0001 XOR (Toggle) : 1101 XOR 1001 = 0100 XOR 1001 = 1101 Assembly Language 17

18 Arithmetic ShiftLogical Shift Assembly Language 18 Left-Shift Right-Shift

19 Stack 10 4F 27 Assembly Language 19 SP 10 4F SP 10 4F A SP PUSH POP

20 Timing of Instructions Assembly Language 20 LDAA #$0F; 2 cycles againDECA; 2 cycles BNEagain; 3 cycles exitJMP$1000; 3 cycles The total execution cycles: * (2 + 3) + 3 = 80 2MHz 68HC11, 1 cycle = 500 ns So, 80 cycles = 40,000 ns = 40 us LDX #$0BB8 repeatDECX BNErepeat From 2MHz 68HC11, Code to delay execution for 9 msec If this code executes on 2.1MHz processor? or in the middle of running the code, if any interrupt happens?

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