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Vijay K. Arora Wilkes University

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Presentation on theme: "Vijay K. Arora Wilkes University"— Presentation transcript:


2 Vijay K. Arora Wilkes University E-mail:

3 Emerging Technologies

4 Our Motivation and Economics Adam Smith, “An Enquiry into Nature and Causes of the Wealth of Nations” (1776) The wealth is created by laisse-faire economy and free trade John Maynard Keynes, “The General Theory of Employment, Interest, and Money” (1936) The wealth is created by careful government planning and government stimulation of economy 1990’s and Beyond The wealth is created by innovations and inventions

5 20 th Century Paradigm  Formulate a hypothesis or theory  Accumulate data  Do extensive experimentation and Check  Publish if newsworthy  Respect others’ work helping them to grow in the profession  Demonstrate character ethics that puts community interests above personal aggrandizement

6 21 st Century Paradigm  Formulate a hypothesis or theory or design  Make a prototype structure  Patent it  Raise 17 million dollars and start an IPO  Sue your competitor for stealing your idea  Demonstrate personality ethics that lubricates the process of human interaction for personal aggrandizement

7 Gross world product and sales volumes

8 Exponential Growth SIA roadmap

9 Historical Trends   New Technology generation every three years   For each generation, memory density increase by 4 times and logic density increases by 2.5 times   Rule of Two: In every two generations (6 years), the feature size decreased by 2, transistor current density, circuit speed, chip area, chip current and maximum I/O pins increased by 2

10 Research Scenario  A comprehensive transport theory for quantum processes at nanosacle  High-field distribution in quantum wells  Optimization of the shape and size of quantum wells for high frequencies  Quantum Computing: Multi-state logic by using quantum states  Failure of Ohm’s Law: Re-assessment of the circuit theory principles

11 Goals for High Speed Performance  Large transistor current Time constantsTime constants InterconnectsInterconnects Cross talkCross talk  Reduced transit time Increased MobilityIncreased Mobility High Saturation VelocityHigh Saturation Velocity Reduced SizeReduced Size

12 RC and Transit Time Delays Source: Cadence

13 Interconnect Problems RC Time Delays  RC time delay is increasing rapidly   Wire resistance is rising   Wires have larger cross-section … introduce coupling   Electromigration imposes current limits   System performance, area and reliability are determined by interconnect quality, not devices!!!

14 Increased cross-section improves performance but also increases noise and capacitive and inductive coupling 1  0.5  0.25  Increasing Performance Decreasing Coupling Effect Interconnect Performance

15 substrate layer m Cs Cf Cc R1R1 R2R2 Cf layer m Co Cf R3R3 layer n R4R4 Cint = Cf + Cs + Co + Cload  = Rint * ( Cint + Cc/(Cint+ Cc) )  = Rint * (Cint 2 + Cint.Cc +Cc)/(Cint + Cc) Cc depends on dimensional shrink due to increased in cross-section In VLSI, make Cc becomes insignificant as possible, then  = Rint * Cint RC Delay Considerations

16 Physical Effects  Quantum Effects  High-Field Effects  Field Broadening

17 Nano-Scale Quantum Engineering

18 Bulk Semiconductors All 3 cartesian directions analog-type Density of States:

19 Quasi-Two-Dimensional QW z-direction digital-type x,y-directions analog-type Density of States:

20 AlGaAs/GaAs/AlGaAs Prototype Quantum Well

21 Quasi-One-Dimensional QW y, z-direction digital-type x-directions analog-type (QWW) Density of States:

22 Quasi-Zero-Dimensional Quantum Well All 3 cartesian directions digital-type Quantum box (dot)

23 Quantum Well Wire Quantum Box (Dot)

24 Quantum Well Arrays

25 Density of States

26 Quantum Well with Finite Boundaries

27 Triangular Quantum Well Approximate: Exact:

28 Quantum-Confined Mobility Degradation  Changes in the Density of States  Changes in the relative strength of each scattering interaction

29 Mobility Degradation Versus Quantum Confinement

30 Gate-Field Confinement Mobility Degradation in a TQW

31 Electron and Hole Mobility in Submicron CMOS Courtesy: Y. Taur and E. Novak, IBM Microelectronics, IEDM97 Invited Talk.

32 Random Thermal Motion

33 Quantum Emission

34 Randomness to Streamlining Velocity Vectors in Equilibrium Randomness: Velocity Vectors in a Very High Field Streamlined:

35 Saturation Velocity-Bulk Fermi Integral Normalized Fermi Energy

36 Saturation Velocity Limits Non-degenerate limit Degenerate limit

37 Saturation Velocity-Q2D

38 Saturation Velocity-Q1D

39 Modeling Transport Transient Response: =0

40 Quantum Emission Effective Collision time: Effective collision length :

41 1-D Random Walk in a Bandgap semiconductor

42 Modeling the Distribution

43 Left-Right Asymmetry Itinerant Electron Population

44 Streamlining the Randomness

45 Drift-Diffusion Drift Velocity Diffusion Drift Diffusion Coefficient

46 Single-Valley v-E Characteristics

47 Velocity-Field Characterisitcs

48 Effect of Degeneracy (2-D)

49 Mobility Degradation

50 Diffusion Coefficient Degradation

51 I-V Characteristics Microresistors

52 Resistance Blow-Up

53 Multi-Valley Transport in GaAs Intervalley Electron Transfer

54 Multi-Valley Transport in GaAs Velocity-Field Characteristics

55 High-Frequency Transport dc Conductivity Degradation ac Conductivity Degradation

56 Conclusions Quantum Confinement  Transport properties function of confinement length in QW’s because of the change in the Density of States  Relative strength of each scattering changes.  Electrons tend to stay away from the interface as wave function vanishes near the interface

57 Conclusions High-Field Driven Transport  Electric field puts an order into otherwise completely random motion  Higher mobility may not necessary lead to higher saturation velocity  Saturation velocity is limited by Fermi /thermal velocity depending on degeneracy  Saturation velocity is lowered by the quantum remission process  RC time constants will dominate over transit time delay because of enhanced resistance

58 Conclusions Failure of Ohm’s Law  Effective resistance may rise dramatically as current approaches saturation level  Familiar voltage divider and current divider rule may not be valid on submicron scales

59 Golden Rule  No matter what the size, make it smaller  No matter what the speed, make it faster  No matter what the function, make it larger  No matter what the cost, make it cheaper  No matter how little it heats up, make it cooler

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