Presentation on theme: "Technical Solutions for High Vacuum Compatible FEE for the EXL Recoil Detector Vacuum operating pressure? bakeout temperature? what’s in the vacuum system,"— Presentation transcript:
Technical Solutions for High Vacuum Compatible FEE for the EXL Recoil Detector Vacuum operating pressure? bakeout temperature? what’s in the vacuum system, what’s not? Materials & construction which materials? Electronics & electrical connections where is the FEE? Mechanical structure detector (and FEE) support Systems integration how do these decisions impact other systems, e.g. calorimeter?
Advanced Implantation Detector Array (AIDA): Update & Issues Tom Davinson School of Physics The University of Edinburgh presented by Tom Davinson on behalf of the AIDA collaboration (Edinburgh – Liverpool – STFC DL & RAL)
Implantation DSSD Configurations Two configurations proposed: a)8cm x 24cm “cocktail” mode many isotopes measured simultaneously b) 8cm x 8cm high efficiency mode concentrate on particular isotope(s)
AIDA: DSSD Array Design 8cm x 8cm DSSDs common wafer design for 8cm x 24cm and 8cm x 8cm configurations 8cm x 24cm 3 adjacent wafers – horizontal strips series bonded 128 p+n junction strips, 128 n+n ohmic strips per wafer strip pitch 625 m wafer thickness 1mm E, Veto and up to 6 intermediate planes 4096 channels (8cm x 24cm) overall package sizes (silicon, PCB, connectors, enclosure … ) ~ 10cm x 26cm x 4cm or ~ 10cm x 10cm x 4cm courtesy B.Rubio
Implantation – Decay Correlation DSSD strips identify where (x,y) and when (t 0 ) ions implanted Correlate with upstream detectors to identify implanted ion type Correlate with subsequent decay(s) at same position (x,y) at times t 1 (,t 2, …) Observation of a series of correlations enables determination of energy distribution and half-life of radioactive decay Require average time between implants at position (x,y) >> decay half-life depends on DSSD segmentation and implantation rate/profile Implantation profile x ~ y ~ 2cm, z ~ 1mm Implantation rate (8cm x 24cm) ~ 10kHz, ~ kHz per isotope (say) Longest half life to be observed ~ seconds Implies quasi-pixel dimensions ~ 0.5mm x 0.5mm
ASIC Design Requirements Selectable gain20100020000MeV FSR Low noise12 60050000keV FWHM energy measurement of implantation and decay events Selectable threshold< 0.25 – 10% FSR observe and measure low energy detection efficiency Integral non-linearity 95% FSR spectrum analysis, calibration, threshold determination Autonomous overload detection & recovery ~ s observe and measure fast implantation – decay correlations Nominal signal processing time < 10 s observe and measure fast decay – decay correlations Receive (transmit) timestamp data correlate events with data from other detector systems Timing trigger for coincidences with other detector systems DAQ rate management, neutron ToF
AIDA: Resources & Tasks Cost Total announced value proposal £1.96M Support Manpower CCLRC DLc. 4.2 SYFEE PCB Design DAQ h/w & s/w CCLRC RALc. 3.5 SYASIC Design & simulation ASIC Production Edinburgh/Liverpoolc. 4.5 SYDSSD Design & production FEE PCB production Mechanical housing/support Platform grant support CCLRC DL/Edinburgh/Liverpool
Schematic of Prototype ASIC Functionality Note – prototype ASIC will also evaluate use of digital signal processing Potential advantages decay – decay correlations to ~ 200ns pulse shape analysis ballistic deficit correction
Diagram (above) of the FEE boards as they would fit in the vertical plane. The grey rectangles are heat conductive foam pads which conform to the component outlines and conduct the heat to the water cooled metalwork. The green is pcb, the orange is a Samtec 80 pin connector with a 2.3mm height and the dark brown is the ASIC. The connections to the detector will be on the mezzanine boards to the left and to the acquisition network computers and BUTIS on the right. These are not shown. Diagram ( alongside) shows the layout of a sub-board.
AIDA Project Information Project web site http://www.ph.ed.ac.uk/~td/AIDA/welcome.html Design Documents http://www.ph.ed.ac.uk/~td/AIDA/Design/design.html Project Technical Specification ASIC Project Specification v1.3 FEE Specification v0.5 The University of Edinburgh (lead RO) Phil Woods et al. The University of Liverpool Rob Page et al. STFC DL & RAL John Simpson et al. Project Manager: Tom Davinson
Acknowledgements This presentation includes material from other people Thanks to: Ian Lazarus & Patrick Coleman-Smith (STFC DL) Steve Thomas (STFC RAL) Dave Seddon & Rob Page (University of Liverpool) Berta Rubio (IFIC, CSIC University of Valencia)
Representative ASIC Noise Analysis Minimise ballistic deficit shaping time >10x t r operate with ~ s noise dominated by leakage current for I D > 10 nA Note – amongst other assumptions, we assume detector cooling
Mechanical Design STFC Daresbury Laboratory professional 3D CAD/CAE engineering effort available Propose STFC Daresbury Laboratory should be responsible for mechanical design of RISING (cluster detectors) array supports and stand 4 Neutron detector stand/overall mechanical design of detector TAS stand/overall mechanical design of detector Fast Timing Array Collaboration remains responsible for detector specification STFC DL responsible for ensuring everything fits! Assuming UK NUSTAR bid to STFC successful funds available for stand construction, shipping and installation at GSI
AIDA: Current Status DSSD request for tender prototypes available 2008/Q3 Prototype ASIC design meeting design specifications submission 2008/Q2 FEE design underway prototype available 2008/Q3 liquid cooling required (cf. AGATA digitiser module) Prototype testing fully instrumented 8cm x 8cm DSSD test experiments being considered for 2009
AIDA: Current Status Evaluating 10nF/100V capacitor arrays long duration operation @ 400V Analog Devices AD9252 14-bit/50MSPS ADC FEE sampling ADC DSSD response high energy heavy-ions simulations Luigi Bardelli et al. Texas A&M - November 2008 MSL type W1(DS)-1000 34MeV/u 32 Cl t r =100ns GSI (100MeV/u) - March 2008? higher energy, heavier ions predict t r > 400ns
Time Jitter Transient signal analysis currently underway (realistic comparator design) Preamplifier risetime ( C f =0.6pF ) t r =110ns LLD threshold 0.26% 20MeV FSR 20MeV signal jitter ~0.13ns rms ( I D =1nA ), ?ns rms ( I D =100nA ) 0.2MeV signal jitter ~2.7ns rms ( I D =1nA ), ~4.0ns rms ( I D =100nA ) events will normally trigger multiple strips ‘simultaneously’ S/N improves as n 1/2 Highlights importance of minimising detector – instrumentation separation reduces noise and risetime radiation damage mitigation detector cooling
Outstanding Issues: approaching the Rubicon Package size 10cm x 26cm x 4cm (10cm x 10cm x 4cm) Mechanical design concepts 10cm x 26cmAIDA/ToF/Ge 10cm x 26cm??AIDA/4 Neutron Detector 10cm x 10cmAIDA/TAS … others? Review ASIC Project Specification DESPEC project requirements satisfied?