Presentation is loading. Please wait.

Presentation is loading. Please wait.

Efficient Embedding of Deterministic Test Data Mudassar Majeed 1, Daniel Ahlström 1, Urban Ingelsson 1, Gunnar Carlsson 2 and Erik Larsson 1 1 Department.

Similar presentations


Presentation on theme: "Efficient Embedding of Deterministic Test Data Mudassar Majeed 1, Daniel Ahlström 1, Urban Ingelsson 1, Gunnar Carlsson 2 and Erik Larsson 1 1 Department."— Presentation transcript:

1 Efficient Embedding of Deterministic Test Data Mudassar Majeed 1, Daniel Ahlström 1, Urban Ingelsson 1, Gunnar Carlsson 2 and Erik Larsson 1 1 Department of Computer and Information Science, Linköping University, Sweden 2 Ericsson AB BU Networks SE Stockholm Sweden

2 2 Purpose  Printed Circuit Boards (PCBs) include an increasing number of integrated circuits (ICs), often of the same type  Example:  Ericsson telecommunication systems contain PCBs with 36 ICs where 4 ICs are of type A, 8 ICs of type B, 8 ICs of type C and 16 ICs of type D  In-field testing is needed due to harsh environment  For in-field test, the problem is to deliver test data to the system  Straight forward solution is to store test data in the system  Drawbacks:  High memory requirements  Inflexibility in applying different tests  The proposed solution uses an embedded test controller to manipulate test data by exploiting structural information of the system  Benefits: Reduces memory requirements and provides flexibility Efficient Embedding of Deterministic Test Data

3 3 Outline  Introduction  Proposed Solution  Experiments and Results  Conclusions MARKERINGSYTA FÖR BILDER När du gör egna slides, placera bilder och andra illustrationer inom dessa fält. Titta gärna i ”baspresentationen” för exempel på hur placeringen kan göras.

4 4 Need for Remote System Test System at Remote Location Flexibility in applying commands Embedded test solution Test Engineer at Office Command 1: Test All Components Command 2: Test Only Component A Introduction

5 5 Embedded Test Solution Command 1: Test All Components Command 2: Test Only Component A Embedded Test Solution PCB Components ABB Test Data Test Resp. Introduction

6 6 IEEE Standard ICs connected serially (IEEE ) B B A  IEEE Standard for PCB testing  Supports testing core logic  Instructions INTEST, BYPASS Introduction

7 7 IC Under Test Using IEEE Standard IEEE IR-scan: Set instruction 2. DR-scan: Apply (execute) IR-scan defines the length of the chain Introduction A BYPASS A Bypass component A 1 bit A INTEST A Test component A 4 bits Stimuli: Instruction: INTESTBYPASS

8 8 System Under Test Using IEEE Std. B B A Command 1: Test All Components Command 2: Test Only Component A INTEST AINTEST B B B A INTEST ABYPASS B Introduction Test Vectors

9 9 Naive Embedded Test Controller Embedded Test Solution CPU Memory Command 1: Test All Components (INTEST AINTEST BINTEST B) Command 2: Test Only Component A (INTEST A BYPASS BBYPASS B) High memory requirements and inflexibility in applying the tests Introduction

10 10 Outline  Introduction  Proposed Solution  Experiments and Results  Conclusions MARKERINGSYTA FÖR BILDER När du gör egna slides, placera bilder och andra illustrationer inom dessa fält. Titta gärna i ”baspresentationen” för exempel på hur placeringen kan göras.

11 11 Key Idea Embedded Test Solution Concatenator Memory Command 1: Test All Components INTEST A INTEST B INTEST B Command 2:Test Only Component A INTEST A BYPASS B BYPASS B Structural Information Provides flexibility in applying the tests Type A Type B Command Command 1: 12 3 Proposed Solution Command 2:

12 12 1. Memory Requirements Memory Reduces memory requirements Naive approachProposed concatenation approach Comparison Proposed Solution

13 13 2. Structural Information B B A Structural Information -Types of components -Order of components in the system -Instruction Register Length -Data Register Length -Instructions Proposed Solution

14 14 3. Concatenator B B A Steps for a given command: 1. Read structural information 2. Read component specific test stimuli 3. Concatenate the stimuli 4. Scan in instruction vector (if required) 5. Scan in and apply test vector 6. Scan out test response 7. Compare with expected response 8. If exit condition met, then terminate 9. Else repeat step 2 Proposed Solution

15 15 Outline  Introduction  Proposed Solution  Experiments and Results  Conclusions MARKERINGSYTA FÖR BILDER När du gör egna slides, placera bilder och andra illustrationer inom dessa fält. Titta gärna i ”baspresentationen” för exempel på hur placeringen kan göras.

16 16 Objectives  To show that the approach works:  We used a PC as test controller and an FPGA as system under test  To see how memory requirements are reduced:  Naive Approach vs Proposed Concatenation Approach (for test command: “test all components”)  We created systems using industrial circuits as ICs Experiments and Results % Reduction in Memory Requirements =

17 17 Industrial Circuits Circuit Length of Test Patterns (bits) Number of Test Patterns Test Data Volume (MBs) ckt ckt ckt ckt ckt ckt ckt ckt Z. Wang and K. Chakrabarty. Test data compression for IP embedded cores using selective encoding of scan slices. In Proc. International Test Conference (ITC), pp , Experiments and Results

18 18 Industrial Circuits Experiments and Results # of Multiplications ckt-1 ckt-2ckt-3ckt-4ckt-5ckt-6 ckt-7ckt-8 Design Set

19 19 Results Experiments and Results Number of Multiplications Percentage Reduction in Memory Requirements Average Set 1 (ckt-1) Set 2 (ckt-2) Set 3 (ckt-3) Set 4 (ckt-4) Set 5 (ckt-5) Set 6 (ckt-6) Set 7 (ckt-7) Set 8 (ckt-8) Set 7 (ckt-7) Set 8 (ckt-8, MBs) Average Set 1 (ckt-1) MBs

20 20 Conclusions  Printed Circuit Boards (PCBs) include an increasing number of integrated circuits (ICs), often of the same type  Systems fail in operation and require in-field testing  Test data volume requires huge memory  The proposed solution exploits,  Structural Information of the system  The fact that multiple components of the same type require same test data  The test data manipulation via an embedded test controller  The reduction in memory requirements depends upon the number of components of the same type  Example:  Ericsson telecommunication systems contain PCBs with 36 ICs where 4 ICs are of type A, 8 ICs of type B, 8 ICs of type C and 16 ICs of type D

21 Efficient Embedding of Deterministic Test Data Mudassar Majeed 1, Daniel Ahlström 1, Urban Ingelsson 1, Gunnar Carlsson 2 and Erik Larsson 1 1 Department of Computer and Information Science, Linköping University, Sweden 2 Ericsson AB BU Networks SE Stockholm Sweden


Download ppt "Efficient Embedding of Deterministic Test Data Mudassar Majeed 1, Daniel Ahlström 1, Urban Ingelsson 1, Gunnar Carlsson 2 and Erik Larsson 1 1 Department."

Similar presentations


Ads by Google