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Lecturer Michael S. McCorquodale Authors Michael S. McCorquodale, Mei Kim Ding, and Richard B. Brown Study and Simulation of CMOS LC Oscillator Phase Noise and Jitter Solid State Electronics Laboratory Center for Wireless Integrated Microsystems Department of Electrical Engineering and Computer Science University of Michigan Ann Arbor, MI USA International Symposium on Circuits and Systems, Bangkok, Thailand, May 2003

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2 Michael S. McCorquodale Center for Wireless Integrated Microsystems University of Michigan Outline Motivation Phase Noise and Timing Jitter Expressions and Relationships Baseline Oscillator Topology Topological Enhancements Simulation Framework and Results Comparison of Results Conclusions MotivationP. Noise + JitterExpressionsBaseline Top.EnhancementsSimulationComparisonConclusions

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3 Michael S. McCorquodale Center for Wireless Integrated Microsystems University of Michigan Motivation Review the relationship between phase noise and timing jitter which is particularly important when considering the overlap of time and frequency domain metrics in modern mixed-signal SoC development Study topological variations in a CMOS LC oscillator that reduce phase noise and jitter Utilize both time and frequency domain simulation environments to measure phase noise and jitter Demonstrate agreement between time and frequency domain simulation environments as well as between calculated and simulated phase noise and jitter Draw conclusions regarding each approach MotivationP. Noise + JitterExpressionsBaseline Top.EnhancementsSimulationComparisonConclusions

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4 Michael S. McCorquodale Center for Wireless Integrated Microsystems University of Michigan Phase Noise and Timing Jitter Timing Jitter Time domain uncertainty in period Figure 1: Timing jitter illustrated Phase Noise Power at frequency offset from fundamental Figure 2: Phase noise illustrated MotivationP. Noise + JitterExpressionsBaseline Top.EnhancementsSimulationComparisonConclusions Ideal Oscillator Output Noisy Oscillator Output

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5 Michael S. McCorquodale Center for Wireless Integrated Microsystems University of Michigan Expressions and Relationships Short-Term Timing Jitter Expressions N-cycle Period (1-cycle) Cycle-to-cycle MotivationP. Noise + JitterExpressionsBaseline Top.EnhancementsSimulationComparisonConclusions Phase Noise Power relative to fund. at offset f m Relationship Between Phase Noise and Jitter Ignoring flicker noise

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6 Michael S. McCorquodale Center for Wireless Integrated Microsystems University of Michigan Expressions and Relationships (N o /P o ) f m = Phase noise density at offset f m F = Noise factor kT = Thermal noise C = Output power Q = Tank quality factor f o = Fundamental frequency f m = Offset from fundamental Lesson’s Equation for Phase Noise Spectral Density Fixed Parameters k, T, f o Obvious Enhancements Increase Q : Motivation for RF MEMS research Increase C : Power is a constraint Another Approach Reduce F, but how? Topology MotivationP. Noise + JitterBaseline Top.EnhancementsSimulationComparisonConclusionsExpressions

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7 Michael S. McCorquodale Center for Wireless Integrated Microsystems University of Michigan Baseline Oscillator Topology 1.8GHz CMOS LC oscillator Fully differential/symmetric Cross-coupled negative resistance sustaining amplifier NMOS tail TSMC 0.18 m mixed-mode BSIM RF noise models Figure 3: Baseline CMOS LC Oscillator Topology MotivationP. Noise + JitterExpressionsBaseline Top.EnhancementsSimulationComparisonConclusions

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8 Michael S. McCorquodale Center for Wireless Integrated Microsystems University of Michigan Topological Enhancements PMOS tail Common mode capacitor Cascode tail Weak inversion tail Figure 4: Enhanced CMOS LC Oscillator Topology MotivationP. Noise + JitterExpressionsBaseline Top.EnhancementsSimulationComparisonConclusions

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9 Michael S. McCorquodale Center for Wireless Integrated Microsystems University of Michigan Phase Noise Simulation SpectreRF Pnoise Results >10dB gain in tail current device polarity change dB gain for each additional modification ~20dB gain overall Simulation convergence difficult but fast if achieved Figure 5: Phase noise performance for each studied topology MotivationP. Noise + JitterExpressionsBaseline Top.EnhancementsSimulationComparisonConclusions

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10 Michael S. McCorquodale Center for Wireless Integrated Microsystems University of Michigan Time Domain Noise Simulation ADS Time Domain Results ~1000 periods collected with max step = 1/10 th expected jitter Processor time: ~10hrs Data recorded: ~250MB Mean period determined Period jitter determined Gaussian distribution around mean period Simulation convergence easy but time consuming Figure 6: Collected period samples Figure 7: Distribution around mean MotivationP. Noise + JitterExpressionsBaseline Top.EnhancementsComparisonConclusionsSimulation

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11 Michael S. McCorquodale Center for Wireless Integrated Microsystems University of Michigan Comparison of Results Oscillator Configuration SpectreRF Phase Noise at 600kHz Offset (dBc/Hz) Calculated Period Jitter from Phase Noise (fs) Agilent ADS Simulated Period Jitter (fs) NMOS tail PMOS tail PMOS tail with capacitor PMOS cascode tail with capacitor PMOS weak inversion cascode tail with capacitor MotivationP. Noise + JitterExpressionsBaseline Top.EnhancementsSimulationComparisonConclusions

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12 Michael S. McCorquodale Center for Wireless Integrated Microsystems University of Michigan Conclusions Reviewed concepts of phase noise and jitter Presented relationships for and between phase noise and jitter Presented topological modifications that improve phase noise and jitter Simulated both phase noise and jitter and showed good agreement between time and frequency domain results as well as calculated data Time domain approach takes considerable time and data space but converges easily Frequency domain approach is fast but it is often difficult to achieve convergence MotivationP. Noise + JitterExpressionsBaseline Top.EnhancementsSimulationComparisonConclusions

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